Product Info

Smart LTE Module Series
SC20 Hardware Design
SC20_Hardware_Design 50 / 130
SD_CMD
120K
NM_51K
SD_DATA3
SD_DATA2
LDO5_1V8
SD_CLK
SD_DATA0
SD_DET
SD_DATA1
P1-DAT2
P2-CD/DAT3
P3-CMD
P4-VDD
P5-CLK
P8-DAT1
GND
P6-VSS
P7-DAT0
DETECTIVE
GND
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
SD_LDO11
33R
33R
33R
33R
33R
33R
1K
33pF
2.2uF
SD_LDO12
Module
R1 R2
R3 R4
R5
R6
NM_51K
NM_10K
NM_51K
NM_51K
R7
R8
R9
R10
R11
R12
R13
D1 D2
D3
D4 D5
D6
D7
D8
C1
C2
SD Card Connector
Figure 19: Reference Circuit for SD Card Interface
SD_LDO11 is a peripheral driver power supply for SD card. The maximum drive current is approx. 600mA.
Because of the high drive current, it is recommended that the trace width is 0.6mm or more. In order to
ensure the stability of drive power, a 2.2uF capacitor should be added in parallel near the SD card
connector.
CMD, CLK, DATA0, DATA1, DATA2 and DATA3 are all high-speed signal lines. In PCB design, please
control the characteristic impedance of them to 50Ω, and do not cross with other traces. It is
recommended to route the trace on the inner layer of PCB, and keep the same trace length for CLK, CMD,
DATA0, DATA1, DATA2 and DATA3. CLK additionally needs ground shielding.
Layout guidelines:
⚫ Control impedance as 50Ω±10%, and ground shielding is required.
⚫ The total trace length difference between CLK and other signal line traces should not exceed 1mm.
Table 15: SD Card Trace Length Inside the Module
Pin No.
Signal
Length (mm)
Comment
39
SD_CLK
14.60
40
SD_CMD
14.55
41
SD_DATA0
14.53
42
SD_DATA1
14.56