Product Info

Smart LTE Module Series
SC20 Hardware Design
SC20_Hardware_Design 46 / 130
UART1 provides 1.8V logic level. A level translator should be used if customers’ application is equipped
with a 3.3V UART interface. A level translator TXS0104PWR provided by Texas Instruments is
recommended. The following figure shows the reference design.
VCCA VCCB
OE
A1
A2
A3
A4
GND
B1
B2
B3
B4
LDO5_1V8
UART1_RTS
UART1_RX
UART1_CTS
UART1_TX
RTS_3.3V
RXD_3.3V
CTS_3.3V
TXD_3.3V
VDD_3.3V
TXS0104EPWR
C1
100pF
C2
U1
100pF
Figure 15: Reference Circuit with Level Translator Chip (for UART1)
The following figure is an example of connection between SC20 and PC. A voltage level translator and a
RS-232 level translator chip are also recommended to be added between the module and PC, as these
two UART interfaces do not support the RS-232 level, while support the 1.8V CMOS level only.
TXS0104EPWR
RTS_3.3V
RXD_3.3V
CTS_3.3V
TXD_3.3V
UART1_RTS
UART1_CTS
RTS_1.8V
RXD_1.8V
CTS_1.8V
TXD_1.8V
VCCA
Module
GND GND
1.8V
VCCB
3.3V
DIN1
ROUT3
ROUT2
ROUT1
DIN4
DIN3
DIN2
DIN5
R1OUTB
FORCEON
/FORCEOFF
/INVALID
3.3V
DOUT1
DOUT2
DOUT3
DOUT4
DOUT5
RIN3
RIN2
RIN1
VCC GND
OE
SN65C3238 DB-9
RTS
TXD
CTS
RXD
GND
UART1_RX
UART1_TX
Figure 16: RS-232 Level Match Circuit (for UART1)
UART2 is similar to UART1. Please refer to UART1 reference circuit designs for UART2’s.
NOTE