Product Info

Smart LTE Module Series
SC20 Hardware Design
SC20_Hardware_Design 45 / 130
of USB differential trace is 90Ω.
⚫ Keep the ESD protection devices as close as possible to the USB connector. Pay attention to the
influence of junction capacitance of ESD protection devices on USB data lines. Typically, the
capacitance value should be less than 2pF.
⚫ Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding on not only upper
and lower layer but also right and left sides.
⚫ Make sure the trace length difference between USB_DM and USB_DP is not exceeding 6.6mm.
Table 11: USB Trace Length Inside the Module
3.10. UART Interfaces
The module provides two UART interfaces:
⚫ UART1: 4-wire UART interface which supports hardware flow control
⚫ UART2: 2-wire UART interface and is used for debugging
Table 12: Pin Definition of UART Interfaces
PIN
Signal
Length (mm)
Length Difference (DP-DM)
13
USB_DM
29.43
-0.07
14
USB_DP
29.36
Pin Name
Pin No
I/O
Description
Comment
UART1_TX
34
DO
UART1 transmit data
1.8V power domain.
If it is unused, keep it open.
UART1_RX
35
DI
UART1 receive data
1.8V power domain.
If it is unused, keep it open.
UART1_CTS
36
DI
UART1 clear to send
1.8V power domain.
If it is unused, keep it open.
UART1_RTS
37
DO
UART1 request to send
1.8V power domain.
If it is unused, keep it open.
UART2_RX
93
DI
UART2 receive data.
Debug port by default.
1.8V power domain.
If it is unused, keep it open.
UART2_TX
94
DO
UART2 transmit data.
Debug port by default.
1.8V power domain.
If it is unused, keep it open.