Product Info

LPWA Module Series
BG95-M3 Mini PCIe Hardware Design
BG95-M3_Mini_PCIe_Hardware_Design 24 / 53
3.5. UART Interface
The UART interface supports 9600, 19200, 38400, 57600, 115200 and 230400 bps baud rates. The
default baud rate is 115200 bps. This interface can be used for AT command communication and data
transmission.
The following table shows the pin definition of the UART interface.
Table 8: Pin Definition of UART Interface
The power domain of UART interface is 3.3 V. Pay attention to the signal direction while connecting the
UART interface to a peripheral MCU/RAM. A reference design of UART interface is provided below:
Figure 7: Reference Design of UART Interface
AT+IPR can be used to set the baud rate of UART interface, and AT+IFC can be used to set the hardware
flow control (hardware flow control is disabled by default). See document [2] for details.
Pin Name Pin No. I/O Power Domain Description
UART_RX 11 DI 3.3 V UART receive data
UART_TX 13 DO 3.3 V UART transmit data
UART_CTS 23 DI 3.3 V UART clear to send
UART_RTS 25 DO 3.3 V UART request to send
NOTE