Product Info

LTE Standard Module Series
EG91 Hardware Design
EG91_Hardware_Design 49 / 96
3.13. SPI Interface
SPI interface of EG91 acts as the master only. It provides a duplex, synchronous and serial
communication link with the peripheral devices. It is dedicated to one-to-one connection, without chip
selection. Its operation voltage is 1.8V with clock rates up to 50MHz.
The following table shows the pin definition of SPI interface.
Table 15: Pin Definition of SPI Interface
Pin Name
Pin No.
I/O
Description
Comment
SPI_CLK
26
DO
Clock signal of SPI interface
1.8V power domain
SPI_MOSI
27
DO
Master output slave input of SPI
interface
1.8V power domain
SPI_MISO
28
DI
Master input slave output of SPI
interface
1.8V power domain
The following figure shows a reference design of SPI interface with peripherals.
SPI_MISO
SPI_MOSI
SPI_CLK
Module
SPI_CLK
SPI_MOSI
SPI_MISO
Peripherals
Figure 25: Reference Circuit of SPI Interface with Peripherals
1. SPI interface is not supported on ThreadX modules.
2. The module provides 1.8V SPI interface. A level translator should be used between the module and
the host if customer’s application is equipped with a 3.3V processor or device interface.
NOTES