Product Info

LTE-A Module Series
EG12 Hardware Design
EG12_Hardware_Design 8 / 100
Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 16
FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 19
FIGURE 3: DRX RUN TIME AND CURRENT CONSUMPTION IN SLEEP MODE ......................................... 32
FIGURE 4: SLEEP MODE APPLICATION VIA UART INTERFACES .............................................................. 33
FIGURE 5: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 34
FIGURE 6: SLEEP MODE APPLICATION WITH RI ......................................................................................... 34
FIGURE 7: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION................................................ 35
FIGURE 8: POWER SUPPLY LIMITS DURING TX POWER ........................................................................... 37
FIGURE 9: STAR STRUCTURE OF THE POWER SUPPLY ........................................................................... 38
FIGURE 10: REFERENCE CIRCUIT OF POWER SUPPLY ............................................................................ 38
FIGURE 11: TURN ON THE MODULE WITH A DRIVING CIRCUIT ............................................................... 39
FIGURE 12: TURN ON THE MODULE USING A BUTTON ............................................................................. 40
FIGURE 13: TIMING OF TURNING ON MODULE ........................................................................................... 40
FIGURE 14: TIMING OF TURNING OFF THE MODULE ................................................................................. 41
FIGURE 15: REFERENCE CIRCUIT OF RESET_N WITH A DRIVING CIRCUIT ........................................... 42
FIGURE 16: REFERENCE CIRCUIT OF RESET_N WITH A BUTTON ........................................................... 42
FIGURE 17: TIMING OF RESETTING THE MODULE ..................................................................................... 43
FIGURE 18: REFERENCE CIRCUIT OF A (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 44
FIGURE 19: REFERENCE CIRCUIT OF A (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 45
FIGURE 20: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 47
FIGURE 21: LEVEL TRANSLATION REFERENCE CIRCUIT WITH AN IC ..................................................... 50
FIGURE 22: LEVEL TRANSLATION REFERENCE CIRCUIT WITH MOSFETS ............................................. 51
FIGURE 23: TIMING OF SPI INTERFACE ....................................................................................................... 52
FIGURE 24: PRIMARY MODE TIMING ............................................................................................................ 53
FIGURE 25: AUXILIARY MODE TIMING .......................................................................................................... 53
FIGURE 26: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC ................................... 55
FIGURE 27: REFERENCE CIRCUIT OF THE NETWORK INDICATOR ......................................................... 57
FIGURE 28: REFERENCE CIRCUITS OF STATUS ........................................................................................ 58
FIGURE 29: PCIE INTERFACE REFERENCE CIRCUIT (RC MODE) ............................................................. 60
FIGURE 30: PCIE INTERFACE REFERENCE CIRCUIT (EP MODE) ............................................................. 61
FIGURE 31: REFERENCE CIRCUIT OF SD CARD APPLICATION ................................................................ 63
FIGURE 32: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 65
FIGURE 33: REFERENCE CIRCUIT OF RF ANTENNA INTERFACES .......................................................... 71
FIGURE 34: REFERENCE CIRCUIT OF GNSS ANTENNA INTERFACE ....................................................... 72
FIGURE 35: MICROSTRIP DESIGN ON A 2-LAYER PCB .............................................................................. 73
FIGURE 36: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB .......................................................... 73
FIGURE 37: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND)
................................................................................................................................................................... 74
FIGURE 38: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND)