Product Info

LTE-A Module Series
EG12 Hardware Design
EG12_Hardware_Design 50 / 100
Table 15: Logic Levels of Digital I/O
VCCA VCCB
OE
A1
A2
A3
A4
A5
A6
A7
A8
GND
B1
B2
B3
B4
B5
B6
B7
B8
VDD_EXT
RI
DCD
RTS
RXD
DTR
CTS
TXD
51K
51K
0.1uF
0.1uF
RI_MCU
DCD_MCU
RTS_MCU
TXD_MCU
DTR_MCU
CTS_MCU
RXD_MCU
VDD_MCU
Translator
VDD_EXT
10K
120K
Figure 21: Level Translation Reference Circuit with an IC
Please visit http://www.ti.com for more information.
Another example with transistor translation circuit is shown as below. The circuit design of dotted line
section can refer to the design of solid line section, and please pay attention to the direction of
connection.
Parameter
Min.
Max.
Unit
V
IL
-0.3
0.6
V
V
IH
1.2
2.0
V
V
OL
0
0.45
V
V
OH
1.35
1.8
V