Product Info

LTE-A Module Series
EG12 Hardware Design
EG12_Hardware_Design 48 / 100
2.0, and less than 0.4pF for USB 3.0.
 If possible, reserve a 0Ω resistor on USB_DP and USB_DM lines respectively.
“*” means under development.
3.11. UART Interfaces
The module provides three UART interfaces: main UART interface, debug UART interface, and BT UART
interface. Features of these interfaces are shown as below:
 Main UART interface supports 4800bps, 9600bps, 19200bps, 38400bps, 57600bps, 115200bps
(default), 230400bps, 460800bps, and 921600bps baud rates. This interface is used for data
transmission and AT command communication.
 Debug UART interface supports 115200bps baud rate. It is used for Linux console and log output.
 BT UART interface supports 115200bps baud rate. It is used for BT communication and can be
multiplexed into SPI interface*.
“*” means under development.
3.11.1. Main UART Interface
The following table shows the main UART interface pin definition.
Table 12: Pin Definition of Main UART Interface
Pin Name
Pin No.
I/O
Description
Comment
CTS
56
DO
Clear to send
1.8V power domain
RTS
57
DI
Request to send
1.8V power domain
RXD
58
DI
Receive data
1.8V power domain
DCD
59
DO
Data carrier detection
1.8V power domain
TXD
60
DO
Transmit data
1.8V power domain
NOTE
NOTE