Product Info

LTE Standard Module Series
EC21 Hardware Design
EC21_Hardware_Design 56 / 120
EC21 supports 16-bit linear data format. The following figures show the primary mode’s timing
relationship with 8KHz PCM_SYNC and 2048KHz PCM_CLK, as well as the auxiliary mode’s timing
relationship with 8KHz PCM_SYNC and 256KHz PCM_CLK.
Figure 22: Primary Mode Timing
Figure 23: Auxiliary Mode Timing
The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio
codec design.