Product Info

Smart LTE Module Series
SC66 Hardware Design
SC66_Hardware_Design 35 / 139
signal (-)
impedance.
DSI1_LN3_P 110
LCD1 MIPI lane 3 data
signal (+)
Camera Interfaces
Pin Name
Pin
No.
I/O Description
DC
Characteristics
Comment
CSI1_CLK_N 89 AI
MIPI clock signal of
rear camera (-)
85Ω differential
impedance.
CSI1_CLK_P 88 AI
MIPI clock signal of
rear camera (+)
CSI1_LN0_N 91 AI
MIPI lane 0 data signal
of rear camera (-)
85Ω differential
impedance.
CSI1_LN0_P 90 AI
MIPI lane 0 data signal
of rear camera (+)
CSI1_LN1_N 93 AI
MIPI lane 1 data signal
of rear camera (-)
85Ω differential
impedance.
CSI1_LN1_P 92 AI
MIPI lane 1 data signal
of rear camera (+)
CSI1_LN2_N 95 AI
MIPI lane 2 data signal
of rear camera (-)
85Ω differential
impedance.
CSI1_LN2_P 94 AI
MIPI lane 2 data signal
of rear camera (+)
CSI1_LN3_N 97 AI
MIPI lane 3 data signal
of rear camera (-)
85Ω differential
impedance.
CSI1_LN3_P 96 AI
MIPI lane 3 data signal
of rear camera (+)
CSI2_CLK_N 184 AI
MIPI clock signal of
depth camera (-)
85Ω differential
impedance.