Product Info

LTE Standard Module Series
EC25 Hardware Design
EC25_Hardware_Design 10 / 112
Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 22
FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 24
FIGURE 3: SLEEP MODE APPLICATION VIA UART ...................................................................................... 38
FIGURE 4: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 39
FIGURE 5: SLEEP MODE APPLICATION WITH RI ......................................................................................... 39
FIGURE 6: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION ................................................ 40
FIGURE 7: POWER SUPPLY LIMITS DURING BURST TRANSMISSION ..................................................... 42
FIGURE 8: STAR STRUCTURE OF THE POWER SUPPLY ........................................................................... 42
FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 43
FIGURE 10: TURN ON THE MODULE BY USING DRIVING CIRCUIT ........................................................... 44
FIGURE 11: TURN ON THE MODULE BY USING KEYSTROKE ................................................................... 45
FIGURE 12: POWER-ON SCENARIO OF MODULE ....................................................................................... 45
FIGURE 13: POWER-OFF SCENARIO OF MODULE ...................................................................................... 46
FIGURE 14: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 47
FIGURE 15: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ...................................................... 48
FIGURE 16: RESET SCENARIO OF MODULE ................................................................................................ 48
FIGURE 17: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 49
FIGURE 18: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR 50
FIGURE 19: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 51
FIGURE 20: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 54
FIGURE 21: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 54
FIGURE 22: PRIMARY MODE TIMING ............................................................................................................ 55
FIGURE 23: AUXILIARY MODE TIMING .......................................................................................................... 56
FIGURE 24: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC ................................... 57
FIGURE 25: REFERENCE CIRCUIT OF SD CARD INTERFACE ................................................................... 58
FIGURE 26: REFERENCE CIRCUIT OF THE NETWORK INDICATOR ......................................................... 61
FIGURE 27: REFERENCE CIRCUITS OF STATUS ........................................................................................ 61
FIGURE 28: SIMPLIFIED BLOCK DIAGRAM FOR ETHERNET APPLICATION ............................................. 63
FIGURE 29: REFERENCE CIRCUIT OF SGMII INTERFACE WITH PHY AR8033 APPLICATION ................ 64
FIGURE 30: REFERENCE CIRCUIT OF WIRELESS CONNECTIVITY INTERFACES WITH FC20 MODULE
................................................................................................................................................................... 66
FIGURE 31: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 68
FIGURE 32: TIMING SEQUENCE FOR ENTERING INTO EMERGENCY DOWNLOAD MODE .................... 68
FIGURE 33: REFERENCE CIRCUIT OF RF ANTENNA INTERFACE ............................................................ 74
FIGURE 34: MICROSTRIP DESIGN ON A 2-LAYER PCB .............................................................................. 75
FIGURE 35: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB .......................................................... 75
FIGURE 36: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND)
................................................................................................................................................................... 75
FIGURE 37: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND)
................................................................................................................................................................... 76