Product Info

Smart LTE Module Series
SC66 Hardware Design
SC66_Hardware_Design 30 / 118
positive input for
headset
MIC3_P
169
AI
Microphone
positive input for
second mic
Second mic input
EAR_P
53
AO
Earpiece positive
output
EAR_M
52
AO
Earpiece negative
output
SPK_P
55
AO
Speaker positive
output
SPK_M
54
AO
Speaker negative
output
HPH_R
51
AO
Headphone right
channel output
HPH_REF
50
AI
Headphone
reference ground
It should be
connected to main
GND
HPH_L
49
AO
Headphone left
channel output
HS_DET
48
AI
Headset insertion
detection
Default high level
USB Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
USB_VBUS
41, 42
PI/P
O
Charging power
input.
Power supply
output for OTG
device.
USB/charger
insertion
detection.
Vmax=10V
Vmin=3.6V
Vnorm=5.0V
USB2_HS_
DM
25
IO
USB 2.0
differential data
bus (minus)
USB 2.0 standard
compliant
90Ω differential
impedance.
USB2_HS_
DP
26
IO
USB 2.0
differential data
bus (plus)
USB1_HS_
DM
33
IO
USB 2.0
differential data
bus (minus)
USB 2.0 standard
compliant
90Ω differential
impedance;
One part of the