Product Info

LTE Module Series
EG91 Hardware Design
EG91_Hardware_Design 47 / 93
Table 13:Logic Levels of Digital I/O
Parameter Min. Max. Unit
V
IL
-0.3 0.6 V
V
IH
1.2 2.0 V
V
OL
0 0.45 V
V
OH
1.35 1.8 V
The module provides 1.8V UART interfaces. A level translator should be used if customers’ application is
equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is
recommended. The following figure shows areference design.
Figure 20: Reference Circuit with Translator Chip
Please visit http://www.ti.com
formore information.
Another example with transistor translation circuit is shown as below. Thecircuitdesign of dotted line
section can refer to the circuitdesign of solid linesection, in terms of both module input and output circuit
design. Please pay attention to the direction of connection.