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EG25-G

Hardware Design

LTE Module Series

Rev. EG25-G_Hardware_Design_V1.0

Date: 2018-12-12

Status: Released

www.quectel.com

Summary of content (103 pages)

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EG25-G Hardware Design LTE Module Series Rev. EG25-G_Hardware_Design_V1.0 Date: 2018-12-12 Status: Released www.quectel.
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LTE Module Series EG25-G Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. 7th Floor, Hongye Building, No.1801 Hongmei Road, Xuhui District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.
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LTE Module Series EG25-G Hardware Design About the Document History Revision Date Author Description 1.
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LTE Module Series EG25-G Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index .....................................................................................................................................
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LTE Module Series EG25-G Hardware Design 4 5 6 7 8 9 10 11 12 13 3.15. SGMII Interface........................................................................................................................ 54 3.16. ADC Interfaces ........................................................................................................................ 56 3.17. Network Status Indication ........................................................................................................ 57 3.18.
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LTE Module Series EG25-G Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF EG25-G MODULE ................................................................................... 11 TABLE 2: KEY FEATURES OF EG25-G MODULE ........................................................................................... 12 TABLE 3: I/O PARAMETERS DEFINITION ....................................................................................................... 18 TABLE 4: PIN DESCRIPTION ............................
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LTE Module Series EG25-G Hardware Design TABLE 42: DESCRIPTION OF DIFFERENT CODING SCHEMES .................................................................. 96 TABLE 43: GPRS MULTI-SLOT CLASSES ...................................................................................................... 97 TABLE 44: EDGE MODULATION AND CODING SCHEMES ...........................................................................
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LTE Module Series EG25-G Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 15 FIGURE 2: PIN ASSIGNMENT (TOP VIEW)..................................................................................................... 17 FIGURE 3: SLEEP MODE APPLICATION VIA UART .......................................................................................
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LTE Module Series EG25-G Hardware Design FIGURE 38: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM) ................................................ 70 FIGURE 39: MECHANICALS OF U.FL-LP CONNECTORS ............................................................................. 70 FIGURE 40: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM) ........................................................... 71 FIGURE 41: REFERENCED HEATSINK DESIGN (HEATSINK AT THE TOP OF THE MODULE) ..................
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LTE Module Series EG25-G Hardware Design 1 Introduction This document defines EG25-G module, and describes its air interfaces and hardware interfaces which are connected with customers’ applications. This document can help customers quickly understand module interface specifications, electrical and mechanical details as well as other related information of EG25-G module. To facilitate its application in different fields, relevant reference design is also provided for customers’ reference.
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LTE Module Series EG25-G Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating EG25-G module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product.
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LTE Module Series EG25-G Hardware Design 2 Product Concept 2.1. General Description EG25-G is an LTE-FDD/LTE-TDD/UMTS/GSM wireless communication module with receive diversity. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA, UMTS, EDGE and GPRS networks. It also provides GNSS 1) and voice functionality 2) for customers’ specific applications. The following table shows the frequency bands of EG25-G module.
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LTE Module Series EG25-G Hardware Design 2.2. Key Features The following table describes the detailed features of EG25-G module. Table 2: Key Features of EG25-G Module Feature Details Power Supply Supply voltage: 3.3V~4.3V Typical supply voltage: 3.
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LTE Module Series EG25-G Hardware Design Internet Protocol Features Support TCP/UDP/PPP/FTP/HTTP/NTP/PING/QMI/NITZ/CMUX*/HTTPS*/ SMTP/MMS*/FTPS*/SMTPS*/SSL*/FILE* protocols Support PAP (Password Authentication Protocol) and CHAP (Challenge Handshake Authentication Protocol) protocols which are usually used for PPP connections SMS Text and PDU mode Point to point MO and MT SMS cell broadcast SMS storage: ME by default (U)SIM Interface Support USIM/SIM card: 1.8V, 3.
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LTE Module Series EG25-G Hardware Design AT Commands Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT commands Network Indication Two pins including NET_MODE and NET_STATUS to indicate network connectivity status Antenna Interfaces Including main antenna interface (ANT_MAIN), Rx-diversity antenna interface (ANT_DIV) and GNSS antenna interface (ANT_GNSS) Physical Characteristics Size: (29.0±0.15)mm × (32.0±0.15)mm × (2.4±0.2)mm Weight: approx. 4.
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LTE Module Series EG25-G Hardware Design ANT_MAIN ANT_GNSS ANT_DIV PAM SAW Switch Duplex LNA SAW VBAT_RF PA APT PRx DRx Tx NAND DDR2 SDRAM Transceiver IQ VBAT_BB PMIC Control Control PWRKEY Baseband RESET_N ADCs 19.2M XO STATUS VDD_EXT USB (U)SIM PCM I2C UARTs SGMII WLAN BT* GPIOs SD Figure 1: Functional Diagram NOTE “*” means under development. 2.4.
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LTE Module Series EG25-G Hardware Design 3 Application Interfaces 3.1. General Description EG25-G is equipped with 144 LGA pads that can be connected to cellular application platform.
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LTE Module Series EG25-G Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of EG25-G module.
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LTE Module Series EG25-G Hardware Design 6. 7. 8. Keep all RESERVED pins and unused pins unconnected. GND pads 85~112 should be connected to ground in the design. RESERVED pads 73~84 should not be designed in schematic and PCB decal, and these pins should be served as a keepout area. “*” means under development. 3.3. Pin Description The following tables show the pin definition of EG25-G modules.
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LTE Module Series EG25-G Hardware Design VDD_EXT 7 PO GND 8, 9, 19, 22, 36, 46, 48, 50~54, 56, 72, 85~112 Provide 1.8V for external circuit Vnorm=1.8V IOmax=50mA Power supply for external GPIO’s pull up circuits. If unused, keep it open. Ground Turn on/off Pin Name PWRKEY RESET_N Pin No. Description DC Characteristics Comment Turn on/off the module VIHmax=2.1V VIHmin=1.3V VILmax=0.5V The output voltage is 0.8V because of the diode drop in the Qualcomm chipset.
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LTE Module Series EG25-G Hardware Design USB_DM 70 IO USB differential data bus (-) Compliant with USB 2.0 standard specification. I/O Description DC Characteristics Require differential impedance of 90Ω. If unused, keep it open. Comment (U)SIM Interface Pin Name Pin No. USIM_GND 10 Specified ground for (U)SIM card Connect (U)SIM card connector GND. For 1.8V (U)SIM: Vmax=1.9V Vmin=1.7V USIM_VDD 14 PO Power supply for (U)SIM card For 3.0V (U)SIM: Vmax=3.05V Vmin=2.7V Either 1.8V or 3.
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LTE Module Series EG25-G Hardware Design USIM_ PRESENCE 13 DI (U)SIM card insertion detection VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. I/O Description DC Characteristics Comment DO Ring indicator VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. DO Data carrier detection VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. Clear to send VOLmax=0.45V VOHmin=1.35V 1.8V power domain.
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LTE Module Series EG25-G Hardware Design VIHmax=2.0V ADC Interfaces Pin Name ADC0 ADC1 Pin No. I/O Description DC Characteristics Comment AI General purpose analog to digital converter Voltage range: 0.3V to VBAT_BB If unused, keep it open. 44 AI General purpose analog to digital converter Voltage range: 0.3V to VBAT_BB If unused, keep it open. Pin No. I/O Description DC Characteristics Comment 45 PCM Interface Pin Name PCM_IN 24 DI PCM data input VILmin=-0.3V VILmax=0.
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LTE Module Series EG25-G Hardware Design keep it open. SD Card Interface Pin Name SDC2_ DATA3 SDC2_ DATA2 SDC2_ DATA1 Pin No. 28 29 30 I/O IO IO IO Description SD card SDIO bus DATA3 SD card SDIO bus DATA2 SD card SDIO bus DATA1 DC Characteristics 1.8V signaling: VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling: VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V 1.8V signaling: VOLmax=0.45V VOHmin=1.4V VILmin=-0.
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LTE Module Series EG25-G Hardware Design VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V SDC2_ DATA0 SDC2_CLK SDC2_CMD 31 32 33 IO DO IO SD card SDIO bus DATA0 SD card SDIO bus clock SD card SDIO bus command 1.8V signaling: VOLmax=0.45V VOHmin=1.4V VILmin=-0.3V VILmax=0.58V VIHmin=1.27V VIHmax=2.0V 3.0V signaling: VOLmax=0.38V VOHmin=2.01V VILmin=-0.3V VILmax=0.76V VIHmin=1.72V VIHmax=3.34V 1.8V signaling: VOLmax=0.45V VOHmin=1.4V 3.0V signaling: VOLmax=0.
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LTE Module Series EG25-G Hardware Design VIHmax=3.34V SD_INS_ DET VDD_SDIO 23 34 DI PO VILmin=-0.3V VILmax=0.6V VIHmin=1.2V VIHmax=2.0V 1.8V power domain. If unused, keep it open. SD card SDIO bus pull-up power IOmax=50mA 1.8V/2.85V configurable. Cannot be used for SD card power. If unused, keep it open. DC Characteristics Comment SD card insertion detect Wireless Connectivity Interfaces Pin Name Pin No. I/O Description WLAN_SLP_ CLK 118 DO WLAN sleep clock If unused, keep it open.
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LTE Module Series EG25-G Hardware Design VIHmin=1.2V VIHmax=2.0V SDC1_CLK SDC1_CMD WAKE_ON_ WIRELESS WLAN_EN 133 134 135 136 COEX_UART_ 137 RX COEX_UART_ 138 TX BT_RTS* BT_TXD* BT_RXD* BT_CTS* 37 38 39 40 DO WLAN SDIO bus clock VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. DO WLAN SDIO bus command VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. DI Wake up the host (EG25-G module) by FC20 module. VILmin=-0.3V VILmax=0.6V VIHmin=1.
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LTE Module Series EG25-G Hardware Design open. BT_EN* 139 DO BT function control via FC20 module Pin No. I/O Description VOLmax=0.45V VOHmin=1.35V 1.8V power domain. If unused, keep it open. DC Characteristics Comment SGMII Interface Pin Name For 1.8V: VOLmax=0.45V VOHmin=1.4V EPHY_RST_N 119 DO Ethernet PHY reset For 2.85V: VOLmax=0.35V VOHmin=2.
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LTE Module Series EG25-G Hardware Design SGMII_RX_M 126 AI SGMII receiving - minus If unused, keep it open. 1.8V/2.85V configurable. If unused, keep it open. 128 PO SGMII MDIO pull-up power source Pin Name Pin No. I/O Description DC Characteristics Comment ANT_DIV 35 AI Diversity antenna 50Ω impedance If unused, keep it open. ANT_MAIN 49 IO Main antenna 50Ω impedance ANT_GNSS 47 AI GNSS antenna 50Ω impedance If unused, keep it open.
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LTE Module Series EG25-G Hardware Design download mode VIHmax=2.0V reserve test point. Description DC Characteristics Comment RESERVED Pins Pin Name Pin No. RESERVED 3, 18, 43, 55, 73~84, 113, 114, 116, 117, 140~144 I/O Reserved Keep these pins unconnected. NOTES 1. Pads 24~27 are multiplexing pins used for audio design on EG25-G module and BT function on FC20 module. 2. “*” means under development. 3.4.
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LTE Module Series EG25-G Hardware Design 3.5. Power Saving 3.5.1. Sleep Mode EG25-G is able to reduce its current consumption to a minimum value during the sleep mode. The following section describes power saving procedures of EG25-G module. 3.5.1.1. UART Application If the host communicates with module via UART interface, the following preconditions can let the module enter into sleep mode.   Execute AT+QSCLK=1 command to enable sleep mode. Drive DTR to high level.
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LTE Module Series EG25-G Hardware Design 3.5.1.2. USB Application with USB Remote Wakeup Function If the host supports USB suspension/resume and remote wakeup function, the following three preconditions must be met to let the module enter into the sleep mode.    Execute AT+QSCLK=1 command to enable sleep mode. Ensure the DTR is held at high level or keep it open. The host’s USB bus, which is connected with the module’s USB interface, enters into suspension state.
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LTE Module Series EG25-G Hardware Design The following figure shows the connection between the module and the host. Module Host VDD USB_VBUS USB_DP USB_DP USB_DM USB_DM AP_READY GPIO RI EINT GND GND Figure 5: Sleep Mode Application with RI   Sending data to EG25-G through USB will wake up the module. When EG25-G has a URC to report, RI signal will wake up the host. 3.5.1.4.
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LTE Module Series EG25-G Hardware Design Switching on the power switch to supply power to USB_VBUS will wake up the module. NOTE Please pay attention to the level match shown in dotted line between the module and the host. For more details about EG25-G power management application, please refer to document [1]. 3.5.2. Airplane Mode When the module enters into airplane mode, the RF function does not work, and all AT commands correlative with RF function will be inaccessible.
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LTE Module Series EG25-G Hardware Design The following table shows the details of VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 57, 58 Power supply for module’s RF part 3.3 3.8 4.3 V VBAT_BB 59, 60 Power supply for module’s baseband part 3.3 3.8 4.3 V GND 8, 9, 19, 22, 36, 46, 48, 50~54, 56, 72, 85~112 Ground - 0 - V 3.6.2. Decrease Voltage Drop The power supply range of the module is from 3.3V to 4.3V.
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LTE Module Series EG25-G Hardware Design VBAT VBAT_RF VBAT_BB + + C2 C3 C4 100nF 33pF 10pF C1 D1 TVS 100uF C5 100uF C6 C7 C8 100nF 33pF 10pF Module Figure 8: Star Structure of the Power Supply 3.6.3. Reference Design for Power Supply Power design for the module is very important, as the performance of the module largely depends on the power source. The power supply should be able to provide sufficient current up to 2A at least.
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LTE Module Series EG25-G Hardware Design NOTE In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, then the power supply can be cut off. 3.6.4. Monitor the Power Supply AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to document [2]. 3.7. Power-on and off Scenarios 3.7.1.
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LTE Module Series EG25-G Hardware Design The other way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike may generate from finger. Therefore, a TVS component is indispensable to be placed nearby the button for ESD protection. A reference circuit is shown in the following figure. S1 PWRKEY TVS Close to S1 Figure 11: Turn on the Module by Using Keystroke The power-on scenario is illustrated in the following figure. NOTE VBA T ≥500ms VIH ≥1.3V PWRKEY VIL≤0.
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LTE Module Series EG25-G Hardware Design NOTE Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them should be no less than 30ms. 3.7.2. Turn off Module The following procedures can be used to turn off the module:   Normal power-down procedure: Turn off the module using the PWRKEY pin. Normal power-down procedure: Turn off the module using AT+QPOWD command. 3.7.2.1.
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LTE Module Series EG25-G Hardware Design NOTES 1. In order to avoid damaging internal flash, please do not switch off the power supply when the module works normally. Only after the module is shut down by PWRKEY or AT command, then the power supply can be cut off. 2. When turning off module with AT command, please keep PWRKEY at high level after the execution of power-off command. Otherwise the module will be turned on again after successfully turn-off. 3.8.
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LTE Module Series EG25-G Hardware Design S2 RESET_N TVS Close to S2 Figure 15: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated in the following figure. VBAT ≤460ms ≥150ms VIH≥1.3V RESET_N VIL≤0.5V Module Status Running Resetting Restart Figure 16: Timing of Resetting Module NOTES 1. 2. Use RESET_N only when failed to turn off the module by AT+QPOWD command and PWRKEY pin. Ensure that there is no large capacitance on PWRKEY and RESET_N pins. 3.9.
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LTE Module Series EG25-G Hardware Design Table 9: Pin Definition of (U)SIM Interface Pin Name Pin No. I/O Description Comment Either 1.8V or 3.0V is supported by the module automatically. USIM_VDD 14 PO Power supply for (U)SIM card USIM_DATA 15 IO Data signal of (U)SIM card USIM_CLK 16 DO Clock signal of (U)SIM card USIM_RST 17 DO Reset signal of (U)SIM card USIM_ PRESENCE 13 DI (U)SIM card insertion detection USIM_GND 10 1.8V power domain. If unused, keep it open.
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LTE Module Series EG25-G Hardware Design USIM_VDD 15K 100nF USIM_GND Module USIM_VDD USIM_RST USIM_CLK USIM_DATA (U)SIM Card Connector VCC RST CLK 0R GND VPP IO 0R 0R 33pF 33pF 33pF GND GND Figure 18: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector In order to enhance the reliability and availability of the (U)SIM card in customers’ applications, please follow the criteria below in (U)SIM circuit design:       Keep placement of (U)SIM card connector to the mo
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LTE Module Series EG25-G Hardware Design 3.10. USB Interface EG25-G contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0 specification and supports high-speed (480Mbps) and full-speed (12Mbps) modes. The USB interface is used for AT command communication, data transmission, GNSS NMEA sentences output, software debugging, firmware upgrade and voice over USB*. The following table shows the pin definition of USB interface.
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LTE Module Series EG25-G Hardware Design A common mode choke L1 is recommended to be added in series between the module and customer’s MCU in order to suppress EMI spurious transmission. Meanwhile, the 0Ω resistors (R3 and R4) should be added in series between the module and the test points so as to facilitate debugging, and the resistors are not mounted by default.
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LTE Module Series EG25-G Hardware Design Table 11: Pin Definition of Main UART Interface Pin Name Pin No. I/O Description Comment RI 62 DO Ring indicator DCD 63 DO Data carrier detection CTS 64 DO Clear to send RTS 65 DI Request to send DTR 66 DI Data terminal ready, sleep mode control TXD 67 DO Transmit data RXD 68 DI Receive data 1.8V power domain Table 12: Pin Definition of Debug UART Interface Pin Name Pin No.
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LTE Module Series EG25-G Hardware Design VDD_EXT VCCA VCCB VDD_MCU 0.1uF 0.1uF OE GND RI A1 B1 RI_MCU DCD A2 B2 DCD_MCU CTS A3 B3 CTS_MCU RTS A4 B4 RTS_MCU DTR A5 B5 DTR_MCU TXD A6 B6 TXD_MCU A7 B7 A8 B8 RXD 51K Translator RXD_MCU 51K Figure 20: Reference Circuit with Translator Chip Please visit http://www.ti.com for more information. Another example with transistor translation circuit is shown as below.
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LTE Module Series EG25-G Hardware Design 3.12. PCM and I2C Interfaces EG25-G provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the following modes and one I2C interface:   Primary mode (short frame synchronization, works as both master and slave) Auxiliary mode (long frame synchronization, works as master only) In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge.
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LTE Module Series EG25-G Hardware Design 125us 1 PCM_CLK 2 31 32 PCM_SYNC MSB LSB MSB LSB PCM_OUT PCM_IN Figure 23: Auxiliary Mode Timing The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio codec design. Table 14: Pin Definition of PCM and I2C Interfaces Pin Name Pin No. I/O Description Comment PCM_IN 24 DI PCM data input 1.8V power domain PCM_OUT 25 DO PCM data output 1.
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LTE Module Series EG25-G Hardware Design PCM_CLK BCLK PCM_SYNC LRCK PCM_OUT DAC PCM_IN ADC I2C_SCL SCL I2C_SDA SDA INP INN BIAS MICBIAS Module 4.7K 4.7K LOUTP LOUTN Codec 1.8V Figure 24: Reference Circuit of PCM Application with Audio Codec NOTES 1. 2. It is recommended to reserve an RC (R=22Ω, C=22pF) circuits on the PCM lines, especially for PCM_CLK. EG25-G works as a master device pertaining to I2C interface. 3.13. SD Card Interface EG25-G supports SDIO 3.0 interface for SD card.
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LTE Module Series EG25-G Hardware Design SDC2_CMD 33 IO SD card SDIO bus command VDD_SDIO 34 PO SD card SDIO bus pull up power 1.8V/2.85V configurable. Cannot be used for SD card power. If unused, keep it open. SD_INS_DET 23 DI SD card insertion detection 1.8V power domain. If unused, keep it open. The following figure shows a reference design of SD card.
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LTE Module Series EG25-G Hardware Design    It is important to route the SDIO signal traces with total grounding. The impedance of SDIO data trace is 50Ω (±10%). Make sure the adjacent trace spacing is two times of the trace width and the load capacitance of SDIO bus should be less than 15pF. It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mm and the total routing length less than 50mm.
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LTE Module Series EG25-G Hardware Design COEX_UART_RX 137 COEX_UART_TX 138 DI LTE/WLAN&BT* coexistence signal 1.8V power domain Cannot be pulled up before startup DO LTE/WLAN&BT* coexistence signal 1.8V power domain Cannot be pulled up before startup BT Part* BT_RTS* 37 DI BT UART request to send 1.8V power domain BT_TXD* 38 DO BT UART transmit data 1.8V power domain BT_RXD* 39 DI BT UART receive data 1.8V power domain BT_CTS* 40 DO BT UART clear to send 1.
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LTE Module Series EG25-G Hardware Design Module FC20 Module PM_ENABL E DCDC/LDO VDD_3V3 POWER VDD_EXT SDC1_DATA3 SDIO_D3 SDC1_DATA2 SDIO_D2 SDC1_DATA1 SDIO_D1 SDC1_DATA0 WLAN SDIO_CLK SDC1_CMD SDIO_CMD WLAN_EN WLAN_EN WLAN_SLP_CLK 32KHZ_IN WAKE_ON_WIREL ESS COEX_UART_RX LTE_UART_TXD COEX_UART_TX LTE_UART_RXD BT_EN BT_RTS Bluetooth* SDIO_D0 SDC1_CLK WAKE_ON_WIREL ESS COEX VIO BT_EN BT_UART_RTS BT_CTS BT_UART_CTS BT_TXD BT_UART_RXD BT_RXD BT_UART_TXD PCM_IN PCM_OUT PCM
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LTE Module Series EG25-G Hardware Design As SDIO signals are very high-speed, in order to ensure the SDIO interface design corresponds with the SDIO 3.0 specification, please comply with the following principles:      It is important to route the SDIO signal traces with total grounding. The impedance of SDIO signal trace is 50Ω (±10%). Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals, etc.
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LTE Module Series EG25-G Hardware Design The following table shows the pin definition of SGMII interface. Table 17: Pin Definition of SGMII Interface Pin Name Pin No. I/O Description Comment EPHY_RST_N 119 DO Ethernet PHY reset 1.8V/2.85V power domain EPHY_INT_N 120 DI Ethernet PHY interrupt 1.8V power domain SGMII_MDATA 121 IO SGMII MDIO (Management Data Input/Output) data 1.8V/2.85V power domain SGMII_MCLK DO SGMII MDIO (Management Data Input/Output) clock 1.8V/2.
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LTE Module Series EG25-G Hardware Design The following figure shows a reference design of SGMII interface with PHY AR8033 application. Module R1 10K R2 1.5K VDD_EXT USIM2_VDD EPHY_INT_N Control AR8033 INT EPHY_RST_N RSTN SGMII_MDATA MDIO SGMII_MCLK MDC USIM2_VDD USIM2_VDD SGMII_RX_P C1 0.1uF SGMII_RX_M C2 0.1uF Close to Module SOP SON SGMII Data SGMII_TX_P 0.1uF C3 SIP SGMII_TX_M 0.
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LTE Module Series EG25-G Hardware Design Table 18: Pin Definition of ADC Interfaces Pin Name Pin No. Description ADC0 45 General purpose analog to digital converter ADC1 44 General purpose analog to digital converter The following table describes the characteristic of the ADC function. Table 19: Characteristic of ADC Parameter Min. ADC0 Voltage Range ADC1 Voltage Range Typ. Max. Unit 0.3 VBAT_BB V 0.3 VBAT_BB V ADC Resolution 15 Bits NOTES 1. 2. 3.
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LTE Module Series EG25-G Hardware Design Table 21: Working State of the Network Connection Status/Activity Indicator Pin Name Logic Level Changes Network Status Always High Registered on LTE network Always Low Others Flicker slowly (200ms High/1800ms Low) Network searching Flicker slowly (1800ms High/200ms Low) Idle Flicker quickly (125ms High/125ms Low) Data transfer is ongoing Always High Voice calling NET_MODE NET_STATUS A reference circuit is shown in the following figure.
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LTE Module Series EG25-G Hardware Design Table 22: Pin Definition of STATUS Pin Name STATUS Pin No. 61 I/O OD Description Comment Indicate the module operation status An external pull-up resistor is required. If unused, keep it open. The following figure shows different circuit designs of STATUS, and customers can choose either one according to customers’ application demands. Module Module VDD_MCU VBAT 10K 2.2K STATUS MCU_GPIO STATUS Figure 30: Reference Circuits of STATUS 3.19.
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LTE Module Series EG25-G Hardware Design URC RI outputs 120ms low pulse when a new URC returns The RI behavior can be changed by AT+QCFG="urc/ri/ring" command. Please refer to document [2] for details. 3.20. USB_BOOT Interface EG25-G provides a USB_BOOT pin. Customers can pull up USB_BOOT to VDD_EXT before powering on the module, thus the module will enter into emergency download mode when powered on. In this mode, the module supports firmware upgrade over USB interface.
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LTE Module Series EG25-G Hardware Design 4 GNSS Receiver 4.1. General Description EG25-G includes a fully integrated global navigation satellite system solution that supports Gen8C Lite of Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS ). EG25-G supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USB interface by default. By default, EG25-G GNSS engine is switched off. It has to be switched on via AT command.
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LTE Module Series EG25-G Hardware Design Accuracy (GNSS) @open sky XTRA enabled 1.6 s CEP-50 Autonomous @open sky <4 m NOTES 1. 2. 3. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock.
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LTE Module Series EG25-G Hardware Design 5 Antenna Interfaces EG25-G antenna interfaces include a main antenna interface, an Rx-diversity antenna interface which is used to resist the fall of signals caused by high speed movement and multipath effect, and a GNSS antenna interface. The impedance of the antenna port is 50Ω. 5.1. Main/Rx-diversity Antenna Interfaces 5.1.1. Pin Definition The pin definition of main antenna and Rx-diversity antenna interfaces is shown below.
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LTE Module Series EG25-G Hardware Design WCDMA B2 1850~1910 1930~1990 MHz WCDMA B4 1710~1755 2110~2155 MHz WCDMA B5 824~849 869~894 MHz WCDMA B6 830~840 875~885 MHz WCDMA B8 880~915 925~960 MHz WCDMA B19 830~845 875~890 MHz LTE-FDD B1 1920~1980 2110~2170 MHz LTE-FDD B2 1850~1910 1930~1990 MHz LTE-FDD B3 1710~1785 1805~1880 MHz LTE-FDD B4 1710~1755 2110~2155 MHz LTE-FDD B5 824~849 869~894 MHz LTE-FDD B7 2500~2570 2620~2690 MHz LTE-FDD B8 880~915 925~960 MHz
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LTE Module Series EG25-G Hardware Design 5.1.3. Reference Design of RF Antenna Interface A reference design of ANT_MAIN and ANT_DIV antenna pads is shown as below. A π-type matching circuit should be reserved for better RF performance. The capacitors are not mounted by default. Main Antenna Module R1 0R ANT_MAIN C1 C2 NM NM Diversity Antenna R2 0R ANT_DIV C3 C4 NM NM Figure 32: Reference Circuit of RF Antenna Interface NOTES 1. 2. 3.
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LTE Module Series EG25-G Hardware Design .
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LTE Module Series EG25-G Hardware Design Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, the following principles should be complied with in RF layout design:      Use an impedance simulation tool to control the characteristic impedance of RF traces as 50Ω. The GND pins adjacent to RF pins should be designed as thermal relief pads, and should be fully connected to ground.
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LTE Module Series EG25-G Hardware Design Table 29: GNSS Frequency Type Frequency Unit GPS/Galileo/QZSS 1575.42±1.023 MHz GLONASS 1597.5~1605.8 MHz BeiDou 1561.098±2.046 MHz A reference design of GNSS antenna is shown as below. VDD GNSS Antenna 10R 0.1uF Module 47nH 100pF ANT_GNSS NM NM Figure 37: Reference Circuit of GNSS Antenna NOTES 1. 2. An external LDO can be selected to supply power according to the active antenna requirement.
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LTE Module Series EG25-G Hardware Design Table 30: Antenna Requirements Type Requirements GNSS 1) Frequency range: 1559MHz~1609MHz Polarization: RHCP or linear VSWR: <2 (Typ.) Passive antenna gain: >0dBi Active antenna noise figure: <1.5dB Active antenna gain: >-2dBi Active antenna embedded LNA gain: 20dB (Typ.) Active antenna total gain: >18dBi (Typ.
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LTE Module Series EG25-G Hardware Design Figure 38: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 39: Mechanicals of U.
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LTE Module Series EG25-G Hardware Design The following figure describes the space factor of mated connector. Figure 40: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://hirose.com.
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LTE Module Series EG25-G Hardware Design 6 Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 31: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.3 4.7 V USB_VBUS -0.3 5.5 V Peak Current of VBAT_BB 0 0.8 A Peak Current of VBAT_RF 0 1.8 A Voltage at Digital Pins -0.3 2.
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LTE Module Series EG25-G Hardware Design 6.2. Power Supply Ratings Table 32: The Module Power Supply Ratings Parameter Description Conditions Min. Typ. Max. Unit VBAT_BB and VBAT_RF The actual input voltages must stay between the minimum and maximum values. 3.3 3.8 4.3 V Voltage drop during burst transmission Maximum power control level on EGSM900. 400 mV IVBAT Peak supply current (during transmission slot) Maximum power control level on EGSM900. 1.8 2.
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LTE Module Series EG25-G Hardware Design 6.4. Current Consumption Table 34: EG25-G Current Consumption Parameter Description Conditions Typ. Unit OFF state Power down 15 uA AT+CFUN=0 (USB disconnected) 1.8 mA GSM @DRX=2 (USB disconnected) 2.9 mA GSM @DRX=5 (USB disconnected) 2.4 mA GSM @DRX=5 (USB suspended) 2.5 mA GSM @DRX=9 (USB disconnected) 2.3 mA DCS @DRX=2 (USB disconnected) 2.9 mA DCS @DRX=5 (USB disconnected) 2.4 mA DCS @DRX=5 (USB suspended) 2.
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LTE Module Series EG25-G Hardware Design LTE-TDD @PF=64 (USB suspended) 3.5 mA LTE-TDD @PF=128 (USB disconnected) 2.7 mA LTE-TDD @PF=256 (USB disconnected) 2.
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LTE Module Series EG25-G Hardware Design EDGE data transfer (GNSS OFF) WCDMA data transfer (GNSS OFF) EG25-G_Hardware_Design GSM900 4DL/1UL @27dBm 180 mA GSM900 3DL/2UL @26dBm 340 mA GSM900 2DL/3UL @24dBm 460 mA GSM900 1DL/4UL @23dBm 576 mA GSM850 4DL/1UL @27dBm 190 mA GSM850 3DL/2UL @26dBm 350- mA GSM850 2DL/3UL @24dBm 465 mA GSM850 1DL/4UL @23dBm 573 mA DCS1800 4DL/1UL @26dBm 200 mA DCS1800 3DL/2UL @25dBm 371 mA DCS1800 2DL/3UL @23dBm 522 mA DCS1800 1DL/4UL @22dBm 670
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LTE Module Series EG25-G Hardware Design LTE data transfer (GNSS OFF) GSM voice call EG25-G_Hardware_Design WCDMA B8 HSUPA @20.5dBm 520 mA WCDMA B19 HSDPA @21dBm 510 mA WCDMA B19 HSUPA @20.5dBm 490 mA LTE-FDD B1 @22.3dBm 743 mA LTE-FDD B2 @22.3dBm 736 mA LTE-FDD B3 @22.3dBm 730 mA LTE-FDD B4 @22.3dBm 725 mA LTE-FDD B5 @22.3dBm 600 mA LTE-FDD B7 @22.3dBm 746 mA LTE-FDD B8 @22.3dBm 648 mA LTE-FDD B12 @22.3dBm 600 mA LTE-FDD B13 @22.3dBm 690 mA LTE-FDD B18 @22.
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LTE Module Series EG25-G Hardware Design WCDMA voice call GSM850PCL=19 @5.5dBm 125 mA DCS1800 PCL=0 @29.5dBm 180 mA DCS1800 PCL=7 @16.5dBm 152 mA DCS1800 PCL=15 @0.5dBm 135 mA PCS1900 PCL=0 @29.5dBm 190 mA PCS1900 PCL=7 @16.5dBm 162 mA PCS1900 PCL=15 @0.5dBm 143 mA WCDMA B1 @22.5dBm 605 mA WCDMA B2 @22.5dBm 630 mA WCDMA B4 @22.5dBm 550 mA WCDMA B5 @22.5dBm 550 mA WCDMA B6 @22.5dBm 590 mA WCDMA B8 @22.5dBm 550 mA WCDMA B19 @22.
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LTE Module Series EG25-G Hardware Design 6.5. RF Output Power The following table shows the RF output power of EG25-G module. Table 36: RF Output Power Frequency Max. Min.
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LTE Module Series EG25-G Hardware Design PCS1900MHz -107.5dBm NA NA -102dBm WCDMA B1 -108.2dBm -108.5dBm -109.2dBm -106.7dBm WCDMA B2 -109.5dBm -109dBm -110dBm -104.7dBm WCDMA B4 -108.5dBm -109dBm -109.7dBm -106.7dBm WCDMA B5 -109.2dBm -109.5dBm -110.4dBm -104.7dBm WCDMA B6 -109dBm -109.5dBm -110.5dBm -106.7dBm WCDMA B8 -109.5dBm -109.5dBm -110.5dBm -103.7dBm WCDMA B19 -109dBm -109.5dBm -110.1dBm -106.7dBm LTE-FDD B1 (10M) -97.3dBm -98.3dBm -99.5dBm -96.
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LTE Module Series EG25-G Hardware Design LTE-TDD B40 (10M) -97.8dBm -97.5dBm -99.2dBm -96.3dBm LTE-TDD B41 (10M) -97.3dBm -97.4dBm -99dBm -94.3dBm 6.7. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components.
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LTE Module Series EG25-G Hardware Design  The heatsink should be designed with as many fins as possible to increase heat dissipation area. Meanwhile, a thermal pad with high thermal conductivity should be used between the heatsink and module/PCB. The following shows two kinds of heatsink designs for reference and customers can choose one or both of them according to their application structure.
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LTE Module Series EG25-G Hardware Design NOTES 1. 2. The module offers the best performance when the internal BB chip stays below 105°C. When the maximum temperature of the BB chip reaches or exceeds 105°C, the module works normal but provides reduced performance (such as RF output power, data rate, etc.).
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LTE Module Series EG25-G Hardware Design 7 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. The tolerances for dimensions without tolerance values are ±0.05mm. 7.1. Mechanical Dimensions of the Module 2.4+/-0.2 (29+/-0.15) (32+/-0.15) 0.
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LTE Module Series EG25-G Hardware Design 32㊣0.15 1.90 3.85 3.5 1.30 3.35 5.96 1.30 1.30 2.0 0.82 1.8 3.0 1.15 2.15 1.8 2.8 4.88 1.10 1.10 1.05 1.6 4.8 6.75 29㊣0.15 2.0 0.80 1.7 4.4 2.49 3.2 3.4 3.2 1.50 2.40 3.45 3.4 3.5 1.25 3.2 1.
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LTE Module Series EG25-G Hardware Design 7.2. Recommended Footprint Figure 45: Recommended Footprint (Top View) NOTES 1. 2. 3. The keepout area should not be designed. For easy maintenance of the module, please keep about 3mm between the module and other components in the host PCB. EG25-G share the same recommended footprint with EC25, but different recommended stencil. Refer to document [4] for more information.
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LTE Module Series EG25-G Hardware Design 7.3. Design Effect Drawings of the Module Figure 46: Top View of the Module Figure 47: Bottom View of the Module NOTE These are design effect drawings of EG25-G module. For more accurate pictures, please refer to the module that you get from Quectel.
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LTE Module Series EG25-G Hardware Design 8 Storage, Manufacturing and Packaging 8.1. Storage EG25-G is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are listed below. 1. Shelf life in vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be:   Mounted within 168 hours at the factory environment of ≤30ºC/60%RH. Stored at <10% RH. 3.
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LTE Module Series EG25-G Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil for the module is recommended to be 0.15mm~0.18mm. For more details, please refer to document [4].
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LTE Module Series EG25-G Hardware Design Max slope 2 to 3°C/sec Reflow time (D: over 220°C) 40 to 60 sec Max temperature 240°C ~ 245°C Cooling down slope 1 to 4°C/sec Reflow Cycle Max reflow cycle 1 8.3. Packaging 1 0. 0㊣ 30.3㊣0.15 0.35㊣0.05 5 1. 29.3㊣0.15 44.00㊣0.3 20.20㊣0.15 44.00㊣0.1 2.00㊣0.1 4.00㊣0.1 30.3㊣0.15 1.75㊣0.1 EG25-G is packaged in tap and reel carriers. Each reel is 11.88m long and contains 250pcs modules. The figure below shows the package details, measured in mm. 4.2㊣0.
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LTE Module Series EG25-G Hardware Design 48.5 Cover tape 13 100 Direction of feed 44.5+0.20 -0.
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LTE Module Series EG25-G Hardware Design 9 Appendix A References Table 40: Related Documents SN Document Name Remark [1] Quectel_EC2x&EGxx&EM05_Power_Management_ Application_Note Power management application note for EC25, EC21, EC20 R2.0, EC20 R2.1, EG95, EG91, EG25-G and EM05 modules [2] Quectel_EG25-G _AT_Commands_Manual EG25-G AT Commands Manual [3] Quectel_EC2x&EGxx&EM05_GNSS_AT_Commands_ Manual GNSS AT Commands Manual for EC25, EC21, EC20 R2.0, EC20 R2.
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LTE Module Series EG25-G Hardware Design CSD Circuit Switched Data CTS Clear To Send DC-HSPA+ Dual-carrier High Speed Packet Access DFOTA Delta Firmware Upgrade Over The Air DL Downlink DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate ESD Electrostatic Discharge FDD Frequency Division Duplex FR Full Rate GLONASS GLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian Global Navigation Satellite System GMSK Gaussian Minimum Shift Keying GNSS Globa
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LTE Module Series EG25-G Hardware Design MIMO Multiple Input Multiple Output MO Mobile Originated MS Mobile Station (GSM engine) MT Mobile Terminated PAP Password Authentication Protocol PCB Printed Circuit Board PDU Protocol Data Unit PF Paging Frame PPP Point-to-Point Protocol QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RHCP Right Hand Circularly Polarized Rx Receive SGMII Serial Gigabit Media Independent Interface SIM Subscribe
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LTE Module Series EG25-G Hardware Design (U)SIM (Universal )Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maximum Input High Level Voltage Value VIHmin Minimum Input High Level Voltage Value VILmax Maximum Input Low Level Voltage Value VILmin Minimum Input Low Level Voltage Value VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHmax Maximum Output High Level Voltage Value VOHmin
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LTE Module Series EG25-G Hardware Design 10 Appendix B GPRS Coding Schemes Table 42: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
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LTE Module Series EG25-G Hardware Design 11 Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
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LTE Module Series EG25-G Hardware Design 14 4 4 NA 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 EG25-G_Hardware_Design 98 / 100
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LTE Module Series EG25-G Hardware Design 12 Appendix D EDGE Modulation and Coding Schemes Table 44: EDGE Modulation and Coding Schemes Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.8kbps MCS-3 GMSK A 14.
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LTE Module Series EG25-G Hardware Design 13 IC & FCC Requirement FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met: 1. This Modular Approval is limited to OEM installation for mobile and fixed applications only.
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LTE Module Series EG25-G Hardware Design If the device is used for other equipment that separate approval is required for all other operating configurations, including portable configurations with respect to 2.1093 and different antenna configurations. For this device, OEM integrators must be provided with labeling instructions of finished products. Please refer to KDB784748 D01 v07, section 8.
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LTE Module Series EG25-G Hardware Design interference, including interference that may cause undesired operation of the device." or "Le présent appareil est conforme aux CNR d’Industrie Canada applicables aux appareils radio exempts de licence.