Users Manual

GSM/GPRS Module Series
M66 Hardware Design
M66_Hardware_Design Confidential / Released 50 / 82
Table 13: Configuration
3.9.2. Timing
The sample rate of the PCM interface is 8 KHz and the clock source is 256
KHz, so every frame contains 32 bits data. M66 supports 16 bits line code
PCM format. The left 16 bits are valid, and the data of the left 16 bits and
the right 16 bits are the same. The following diagram shows the timing of
different combinations. The synchronization length in long
synchronization format can be programmed by firmware from one bit to
eight bits.
You can configure the PCM input and output volume by executing AT+QPCMVOL command. For more
PCM
Line Interface Format Linear
Data Length Linear: 16 bits
Sample Rate 8KHz
PCM Clock/Synchronization Source
PCM master mode: clock and synchronization is
generated by module
PCM Synchronization Rate 8KHz
PCM Clock Rate PCM master mode: 256 KHz (line)
PCM Synchronization Format Long/short synchronization
PCM Data Ordering MSB first
Zero Padding NO
Sign Extension NO