Product Info

LTE Module Series
BG96 Hardware Design
BG96_Hardware_Design 36 / 81
Figure 4: Power Supply Limits during Burst Transmission
To decrease voltage drop, a bypass capacitor of about 100µF with low
ESRshould be used, and a multi-layer ceramic chip capacitor (MLCC) array
should also be reserved due to its low ESR.It is recommended to use three
ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and
place these capacitors close to VBAT pins.The main power supply from an
external application has to be a single voltage source and can be expanded to
two sub paths with star structure. The width of VBAT_BB trace should be no
less than 0.5mm, and the width of VBAT_RF trace should be no less than 2mm.
In principle, the longer the VBAT trace is, the wider it will be.
In addition, in order to get a stable power source, it is suggested to use a TVS with suitable reverse
stand-off voltageand lower leakage current. and place it as close to the VBATpins as possible. The
following figure shows the star structure of the power supply.