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SC606T Series

Hardware Design

Smart Module Series

Version: 1.0

Date: 2021-03-16

Status: Released

Summary of content (120 pages)

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SC606T Series Hardware Design Smart Module Series Version: 1.
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Smart Module Series SC606T Series Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China Tel: +86 21 5108 6236 Email: info@quectel.com Or our local office. For more information, please visit: http://www.quectel.com/support/sales.htm.
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Smart Module Series SC606T Series Hardware Design Copyright The information contained here is proprietary technical information of Quectel. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design. Copyright © Quectel Wireless Solutions Co., Ltd. 2021. All rights reserved.
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Smart Module Series SC606T Series Hardware Design Safety Information The following safety precautions must be observed during all phases of operation, such as usage, service or repair of any cellular terminal or mobile incorporating the module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product.
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Smart Module Series SC606T Series Hardware Design About the Document Revision History Version Date Author Description - 2021-01-25 Dorian MENG/ Mike ZENG Creation of the document 1.
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Smart Module Series SC606T Series Hardware Design Contents Safety Information ....................................................................................................................................... 3 About the Document ................................................................................................................................... 4 Contents .....................................................................................................................................
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Smart Module Series SC606T Series Hardware Design 3.20.1. Reference Design for Microphone Interfaces ................................................................ 68 3.20.2. Reference Design for Earpiece Interface ....................................................................... 69 3.20.3. Reference Design for Headphone Interface .................................................................. 69 3.20.4. Reference Design for Loudspeaker Interface .................................................
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Smart Module Series SC606T Series Hardware Design 10 Appendix A References................................................................................................................... 111 11 Appendix B GPRS Coding Schemes ............................................................................................. 116 12 Appendix C GPRS Multi-slot Classes ............................................................................................ 117 13 Appendix D EDGE Modulation and Coding Schemes .
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Smart Module Series SC606T Series Hardware Design Table Index Table 1: Frequency Bands, CA Combinations and GNSS Types of SC606T-EM ..................................... 15 Table 2: Frequency Bands, CA Combinations and GNSS Types of SC606T-NAD ................................... 16 Table 3: Frequency Bands, CA Combinations and GNSS Types of SC606T-JP ...................................... 16 Table 4: Frequency Bands of SC606T-WF ..............................................................................
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Smart Module Series SC606T Series Hardware Design Table 42: SC606T-JP Current Consumption .............................................................................................. 91 Table 43: SC606T-EM Current Consumption ............................................................................................ 93 Table 44: SC606T-JP RF Output Power .................................................................................................... 97 Table 45: SC606T-EM RF Output Power ...........
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Smart Module Series SC606T Series Hardware Design Figure Index Figure 1: Functional Diagram ..................................................................................................................... 21 Figure 2: Pin Assignment (Perspective View) ............................................................................................ 23 Figure 3: Voltage Drop Sample ..................................................................................................................
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Smart Module Series SC606T Series Hardware Design Figure 42: Top and Side Dimensions (Unit: mm) ..................................................................................... 103 Figure 43: Bottom Dimensions (Perspective View) ................................................................................. 104 Figure 44: Recommended Footprint (Perspective View) ......................................................................... 105 Figure 45: Top and Bottom Views .............................
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Smart Module Series SC606T Series Hardware Design 1 Introduction This document provides information on the functional features, interface specifications, as well as electrical and mechanical details of the SC606T series modules (SC606T-EM, SC606T-NAD, SC606T-JP, and SC606T-WF). Consult this document to learn about the air and hardware interfaces and external application reference designs among other related information of the series modules.
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Smart Module Series SC606T Series Hardware Design LTE BAND 25 8.00 8.00 LTE BAND 26(814-824) 9.36 N/A LTE BAND 26(824-849) 9.41 8.25 LTE BAND 41 8.00 8.00 LTE BAND 66 5.00 5.00 LTE BAND 71 7.15 7.62 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines.
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Smart Module Series SC606T Series Hardware Design a transmitter certified module and a module is added, the host manufacturer is responsible for ensuring that the after the module is installed and operational the host continues to be compliant with the Part 15B unintentional radiator requirements.
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Smart Module Series SC606T Series Hardware Design 2 Product Concept 2.1. General Description SC606T is a series of smart modules applicable to Linux operating system and provides industrial-grade performance. Their general features are listed below: ⚫ ⚫ ⚫ ⚫ ⚫ ⚫ Support LTE-FDD, LTE-TDD, DC-HSDPA, DC-HSUPA, HSPA+, HSDPA, HSUPA, WCDMA, EDGE, GPRS and GSM; Support short-range wireless communication via Wi-Fi 802.11a/b/g/n/ac and BT 4.
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Smart Module Series SC606T Series Hardware Design GNSS GPS: 1575.42 ±1.023 MHz GLONASS: 1597.5–1605.8 MHz BeiDou: 1561.098 ±2.046 MHz Table 2: Frequency Bands, CA Combinations and GNSS Types of SC606T-NAD Mode Details LTE-FDD B2/B4/B5/B7/B12/B13/B14/B17/B25/B26/B66/B71 LTE-TDD B41 Intra-band 2CA (DL) 2A-2A, 2C, 4A-4A, 5A-5A, 5B, 7A-7A,7C, 66A-66A, 66B, 66C, 41A-41A, 41C WCDMA B2/B4/B5 GSM - Wi-Fi 802.11a/b/g/n/ac 2402–2482 MHz; 5180–5825 MHz BT 4.2 LE 2402–2480 MHz GNSS GPS: 1575.42 ±1.
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Smart Module Series SC606T Series Hardware Design Table 4: Frequency Bands of SC606T-WF Mode Details LTE-FDD - LTE-TDD - WCDMA - GSM - Wi-Fi 802.11a/b/g/n/ac 2402–2482 MHz; 5180–5825 MHz BT 4.2 LE 2402–2480 MHz GNSS - SC606T series module is an SMD-type module, which can be embedded into applications through its 323 pins (152 LCC and 171 LGA pins). With a compact profile of 43.0 mm × 44.0 mm × 2.
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Smart Module Series SC606T Series Hardware Design Transmitting Power Class 4 (33 dBm ±2 dB) for GSM850 Class 4 (33 dBm ±2 dB) for EGSM900 Class 1 (30 dBm ±2 dB) for DCS1800 Class 1 (30 dBm ±2 dB) for PCS1900 Class E2 (27 dBm ±3 dB) for GSM850 8-PSK Class E2 (27 dBm ±3 dB) for EGSM900 8-PSK Class E2 (26 dBm ±3 dB) for DCS1800 8-PSK Class E2 (26 dBm ±3 dB) for PCS1900 8-PSK Class 3 (24 dBm +1/-3 dB) for WCDMA bands Class 3 (23 dBm ±2 dB) for LTE-FDD bands Class 3 (23 dBm ±2 dB) for LTE-TDD bands LTE Featur
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Smart Module Series SC606T Series Hardware Design SMS cell broadcast LCM Interfaces Support two groups of 4-lane MIPI_DSI Support dual LCDs Support WUXGA up to 1200 (RGB) × 1920 @ 60 fps Camera Interfaces Support three groups of 4-lane MIPI_CSI, up to 2.
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Smart Module Series SC606T Series Hardware Design Antenna Interfaces Main antenna, Rx-diversity antenna, GNSS antenna, Wi-Fi/BT antenna, and FM antenna Physical Characteristics Size: (43.0 ±0.15) mm × (44.0 ±0.15) mm × (2.85 ±0.2) mm Package: LCC + LGA Weight: approx. 13.
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Smart Module Series SC606T Series Hardware Design Power Power Signal Function ANT_ MAIN C1 ANT_ GNSS ANT_DRX ANT_FM ANT_WIFI/BT VPH_PWR V DD_ RF SAW PWRKEY MICs APT SPK EAR PWM DIP LNA SAW SAW Duplexs Codec SAW 5G FEM SAW PA Headset ADC Switch PAM Transceiver HK ADC & MPPs 48MHz XO RFCLK WCN VRTC SD_LDO11 USIM1_VDD BBCLK LPDDR eMMC USIM2_VDD LDO6_1P8 LDO5_1P8 19.
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Smart Module Series SC606T Series Hardware Design 3 Application Interfaces 3.1. General Description The following chapters describe in detail the pins/interfaces listed below.
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Smart Module Series SC606T Series Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of the series.
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Smart Module Series SC606T Series Hardware Design 3.3. Pin Description Table 6: I/O Parameters Definition Type Description AI Analog input AO Analog output AIO Analog input/output DI Digital input DO Digital output DIO Digital input/output OD Open drain PI Power input PO Power output The following tables show the module’s pin definition and electrical characteristics. Table 7: Pin Description Power Supply Pin Name VBAT VDD_RF Pin No.
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Smart Module Series SC606T Series Hardware Design Vmax = 4.4 V Vmin = 3.55 V Vnom = 3.8 V VPH_PWR 220, 221 PO Power supply for peripherals VRTC 16 PI/ PO Power supply for RTC VOmax = 3.2 V VI = 2.0–3.25 V PO 1.8 V output power for external GPIO’s pull-up circuits and level shifter Vnom = 1.8 V IOmax = 20 mA LDO5_1P8 LDO10_2P8 LDO6_1P8 LDO17_ 2P85 LDO23_1P2 LDO2_1P1 LDO22_2P8 9 11 10 12 15 13 14 PO 2.8 V output power for VDD of sensors and TPs PO 1.
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Smart Module Series SC606T Series Hardware Design pin open. GND 3, 4, 18, 20, 31, 34, 35, 40, 43, 47, 56, 62, 87, 98, 101, 112, 125, 128, 130, 133, 135, 148, 150, 159, 160, 163, 170, 173, 176, 182, 193, 195, 219, 225, 243, 257–323 Audio Interfaces Pin Name Pin No. I/O Description DC Characteristics MIC_BIAS 167 PO Bias voltage output for microphone VO = 1.6–2.
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Smart Module Series SC606T Series Hardware Design Pin Name Pin No. I/O Description DC Characteristics Vmax = 10.0 V Vmin = 4.0 V Vnom = 5.0 V Comment USB_VBUS 41, 42 AI USB connection detect USB_DM 33 AIO USB differential data (-) USB_DP 32 AIO USB differential data (+) 90 Ω differential impedance. USB 2.0 standard compliant. USB_ID 30 DO USB ID detect High level by default. DI USB ID interrupt detection Pulled up internally.
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Smart Module Series SC606T Series Hardware Design 1.8 V. If unused, keep this pin open. Disabled by default, and can be enabled through software configuration. USIM1_RST 144 DO (U)SIM1 card reset VOLmax = 0.4 V VOHmin = 0.8 × USIM1_VDD USIM1_CLK 143 DO (U)SIM1 card clock VOLmax = 0.4 V VOHmin = 0.8 × USIM1_VDD (U)SIM1 card data VILmax = 0.2 × USIM1_VDD VIHmin = 0.7 × USIM1_VDD VOLmax = 0.4 V VOHmin = 0.8 × USIM1_VDD Require to be pulled up to USIM1_VDD with a 10 kΩ resistor.
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Smart Module Series SC606T Series Hardware Design 0.2 × USIM2_VDD VIHmin = 0.7 × USIM2_VDD VOLmax = 0.4 V VOHmin = 0.8 × USIM2_VDD USIM2_VDD 210 up to USIM2_VDD with a 10 kΩ resistor. PO (U)SIM2 card power supply 1.8 V (U)SIM: Vmax = 1.90 V Vmin = 1.70 V 2.95 V (U)SIM: Vmax = 3.04 V Vmin = 2.7 V Either 1.8 V or 2.95 V (U)SIM card is supported. Comment UART Interfaces Pin Name Pin No. I/O Description DC Characteristics UART2_TXD 5 DO UART2 transmit VOLmax = 0.45 V VOHmin = 1.
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Smart Module Series SC606T Series Hardware Design VIHmin = 1.27 V VOLmax = 0.45 V VOHmin = 1.4 V 2.95 V SD card: VILmax = 0.73 V VIHmin = 1.84 V VOLmax = 0.37 V VOHmin = 2.2 V 1.8 V SD card: VILmax = 0.58 V VIHmin = 1.27 V VOLmax = 0.45 V VOHmin = 1.4 V 2.95 V SD card: VILmax = 0.73 V VIHmin = 1.84 V VOLmax = 0.37 V VOHmin = 2.
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Smart Module Series SC606T Series Hardware Design LCM Interfaces Pin Name Pin No. I/O Description DC Characteristics PMU_MPP4 152 DO General-purpose ADC interface VOLmax = 0.45 V VOHmin = 1.35 V Comment If the default function of this pin is not used, it can be configured into a general-purpose GPIO. GPIO_33 238 DO General-purpose clock output for blacklight driver. LCD0_RST 127 DO LCD0 reset VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. Active low.
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Smart Module Series SC606T Series Hardware Design DSI1_LN0_N 105 AO LCD1 MIPI lane 0 data (-) DSI1_LN0_P 104 AO LCD1 MIPI lane 0 data (+) DSI1_LN1_N 107 AO LCD1 MIPI lane 1 data (-) DSI1_LN1_P 106 AO LCD1 MIPI lane 1 data (+) DSI1_LN2_N 109 AO LCD1 MIPI lane 2 data (-) DSI1_LN2_P 108 AO LCD1 MIPI lane 2 data (+) DSI1_LN3_N 111 AO LCD1 MIPI lane 3 data (-) DSI1_LN3_P 110 AO LCD1 MIPI lane 3 data (+) Camera Interfaces Pin Name Pin No.
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Smart Module Series SC606T Series Hardware Design CSI1_CLK_P 183 AI MIPI clock of depth camera (+) CSI1_LN0_N 186 AI MIPI lane 0 data of depth camera (-) CSI1_LN0_P 185 AI MIPI lane 0 data of depth camera (+) CSI1_LN1_N 188 AI MIPI lane 1 data of depth camera (-) CSI1_LN1_P 187 AI MIPI lane 1 data of depth camera (+) CSI1_LN2_N 190 AI MIPI lane 2 data of depth camera (-) CSI1_LN2_P 189 AI MIPI lane 2 data of depth camera (+) CSI1_LN3_N 192 AI MIPI lane 3 data of depth camera
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Smart Module Series SC606T Series Hardware Design MCAM_RST 74 DO Reset of rear camera VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. MCAM_PWDN 73 DO Power down of rear camera VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. SCAM_RST 72 DO Reset of front camera VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. SCAM_PWDN 71 DO Power down of front camera VOLmax = 0.45 V VOHmin = 1.35 V 1.8 V power domain. CAM_I2C_ SCL 75 OD I2C clock of front and rear cameras 1.
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Smart Module Series SC606T Series Hardware Design ADC Interface Pin Name Pin No. I/O Description PMU_MPP2 151 AI General-purpose ADC interface DC Characteristics Comment Maximum input voltage: 1.7 V. Antenna Interfaces Pin Name Pin No. I/O Description ANT_MAIN 19 AIO Main antenna interface ANT_DRX 149 AI Diversity antenna interface ANT_GNSS 134 AI GNSS antenna interface ANT_WIFI/BT 129 AIO Wi-Fi/BT antenna interface FM_ANT 244 AI FM antenna interface Pin Name Pin No.
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Smart Module Series SC606T Series Hardware Design GPIO_89 232 DIO General-purpose input/output GPIO_90 231 DIO General-purpose input/output GPIO_96 230 DIO General-purpose input/output GPIO_97 229 DIO General-purpose input/output GPIO_98 177 DIO General-purpose input/output GPIO_99 178 DIO General-purpose input/output Pin Name Pin No.
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Smart Module Series SC606T Series Hardware Design GNSS_LNA_ EN 202 DO GNSS LNA enable control GRFC_5 242 DIO Generic RF controller GRFC_7 241 DIO Generic RF controller S1A 215 S1B 216 S2A 211 S2B 233 For test purpose only. If unused, keep this pin open. Only used for RF tuner control. S1A and S1B are connected in the module S2A and S2B are connected in the module Reserved Interface Pin Name Pin No.
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Smart Module Series SC606T Series Hardware Design 3A Input current 3.8 V Voltage 3.1 V Figure 3: Voltage Drop Sample To decrease voltage drop, a bypass capacitor of about 100 µF with low ESR (0.7 Ω) should be used for VBAT pins, and multi-layer ceramic chip capacitor (MLCC) arrays should also be added for their ultra-low ESR. It is recommended to use three ceramic capacitors (100 nF, 33 pF, 10 pF) to compose each MLCC array and place these arrays close to the VBAT/VDD_RF/VPH_PWR pins separately.
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Smart Module Series SC606T Series Hardware Design The following figure shows the reference design for a +5 V power supply which is regulated with an LDO (MIC29502WU) from Microchip. The typical output volage of the LDO is 3.8 V and the rated current of it is 5.0 A.
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Smart Module Series SC606T Series Hardware Design Another way to control PWRKEY is with a button. A Transient Voltage Suppressor (TVS) should be placed nearby the button for ESD protection. A reference design is shown in the following figure. S1 PWRKEY 1K TVS Close to S1 Figure 7: Turn On Module Using Button The timing of turning on the module is illustrated in the following figure. VBAT (Typ.3.8 V) Note2 PWRKEY > 1.6 s 61.
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Smart Module Series SC606T Series Hardware Design 3.5.2. Turn Off Module One way to turn off the module is to pull down PWRKEY for at least 1 s, and then choose to turn off when the prompt window comes up on the display screen connected to an LCM interface of the module. Another way is to drive PWRKEY low for at least 8 s, which forces the module to shut down. The forced power-down timing is illustrated in the following figure. VBAT > 8s PWRKEY Others Power down Figure 9: Power-off Timing 3.6.
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Smart Module Series SC606T Series Hardware Design ⚫ ⚫ being 3.0 V; When powered by VBAT, the RTC has an error rate of 50 ppm, while when powered by VRTC, the RTC deviation is about 200 ppm; If a rechargeable battery is used, the ESR of the battery should be less than 2 kΩ, and it is recommended to use the battery MS621FE FL11E from Seiko. 3.7. Power Output The module can output regulated voltages for peripheral circuits.
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Smart Module Series SC606T Series Hardware Design 3.8. USB Interface The module is integrated with a USB interface that is USB 3.0/2.0 specifications compliant and supports super speed (5 Gbps) on USB 3.0, high speed (480 Mbps) and full speed (12 Mbps) modes on USB 2.0, as well as USB OTG function on both USB 2.0 and USB 3.0. This USB interface is used for AT command communication, data transmission, software debugging and firmware upgrade. Table 9: Pin Definition of USB Interface Pin Name Pin No.
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Smart Module Series SC606T Series Hardware Design USB_ID and GPIO_1 pins. When an OTG is connected to the USB Type-C interface, the USBC_CC1 and USBC_CC2 will force the USB_ID to output a low voltage level to pull down GPIO_1, thus making the module enter Host mode. If USB OTG is not used, the USB_ID should be kept open. In the design of the USB 2.0 interface, it is recommended to connect the module’s GPIO_1 directly to the USB_ID of external micro USB interface for USB ID detection.
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Smart Module Series SC606T Series Hardware Design The following is a reference design for the USB Type-C interface: L1 AW3605DNR 1.
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Smart Module Series SC606T Series Hardware Design Table 10: USB Trace Length Inside the Module Pin No. Signal Length (mm) 33 USB_DM 39.52 32 USB_DP 39.07 171 USB_SS_RX_P 28.55 172 USB_SS_RX_M 28.23 174 USB_SS_TX_P 19.58 175 USB_SS_TX_M 19.35 Length Difference (mm) -0.45 0.32 0.23 3.9. UART Interfaces The module provides the following three UART interfaces: ⚫ ⚫ ⚫ UART2: 2-wire UART interface, used for debugging. UART4: 2-wire UART interface.
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Smart Module Series SC606T Series Hardware Design application is equipped with a 3.3 V UART interface. The level translator chip TXS0104EPWR provided by Texas Instruments is recommended. The following figure shows a reference design for the level translator chip. LDO5_1P8 C1 100 pF VCCB VCCA U1 OE VDD_3.3V C2 100 pF GND UART 5_ CTS A1 B1 CTS_3.3V UART 5_ RTS A2 B2 RTS_3.3V TXS0104 EPWR UART5_ TXD A3 B3 TXD_3.3V UART5_ RXD A4 B4 RXD_3.
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Smart Module Series SC606T Series Hardware Design 3.10. (U)SIM Interfaces The module provides two (U)SIM interfaces which meet ETSI and IMT-2000 requirements. Dual SIM Dual Standby is supported by default. Both 1.8 V and 2.95 V (U)SIM cards are supported, and the (U)SIM interfaces are powered via dedicated LDOs in the module. Table 12: Pin Definition of (U)SIM Interfaces Pin Name Pin No. I/O Description Comment Active low. Require to be externally pulled up to 1.8 V. If unused, keep this pin open.
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Smart Module Series SC606T Series Hardware Design an 8-pin (U)SIM card connector is shown below. LD05_1P8 USIM_ VDD R1 R2 100K 10K C1 (U)SIM Card Connector 100 nF USIM_ VDD Module USIM_ RST R3 USIM_ CLK USIM_ DET R4 22R 22R USIM_ DATA R5 22R C2 VCC RST CLK C3 GND VPP IO D1 C4 22 pF 22 pF 22 pF ESD Figure 15: Reference Design for (U)SIM Interface with an 8-pin (U)SIM Card Connector If there is no need to use USIM_DET, keep it open.
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Smart Module Series SC606T Series Hardware Design ⚫ EMI spurious transmission and enhance ESD protection. Ensure the ESD device is close to the (U)SIM card connector. Add 22 pF capacitors in parallel on USIM_DATA, USIM_CLK and USIM_RST signal traces so as to filter RF interference, and place these capacitors as close to the (U)SIM card connector as possible. 3.11. SD Card Interface The SD card interface of the module complies with SD 3.0 specifications.
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Smart Module Series SC606T Series Hardware Design SD_LDO12 LDO5_1P8 R1 R2 R3 R4 R5 SD_LDO11 R6 120K SD_DATA2 SD_DATA3 SD_CMD R7 R8 R9 33R 33R 33R SD_CLK R10 33R SD_DATA0 SD_DATA1 SD_DET R11 R12 R13 33R 33R 1K Module NM_51K NM_51K NM_10K NM_51K NM_51K 1 2 3 4 5 6 P1-DAT2 P2-CD/DAT3 P3-CMD P4-VDD P5-CLK P6-VSS 7 P7-DAT0 8 P8-DAT1 9 DETECTIVE D1 D2 D3 D4 D5 D6 D7 C1 C2 D8 4.
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Smart Module Series SC606T Series Hardware Design 66 SD_DATA2 32.11 65 SD_DATA3 32.11 3.12. GPIO Interfaces The module has multiple GPIO interfaces with power domain of 1.8 V. The pin definition is listed below. Table 15: Pin Definition of GPIO Interfaces Pin Name Pin No.
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Smart Module Series SC606T Series Hardware Design NOTES 1. 2. 1) Wakeup: interrupt pins that can wake up the system. For more details about GPIO configuration, see document [2]. 3.13. I2C Interfaces Every model of the series provides five groups of I2C interfaces. As an open-drain output, each I2C interface should be pulled up to 1.8 V. The SENSOR_I2C interface supports only sensors of the ADSP architecture.
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Smart Module Series SC606T Series Hardware Design Table 17: Pin Definition of SPI Interfaces Pin Name Pin No I/O Description SPI_CS 58 DO SPI chip select SPI_CLK 59 DO SPI clock SPI_MOSI 60 DO SPI master-out slave-in SPI_MISO 61 DI SPI master-in salve-out FP_SPI_CS 203 DO FP SPI chip select FP_SPI_CLK 250 DO FP SPI clock FP_SPI_MOSI 249 DO FP SPI master-out slave-in FP_SPI_MISO 251 DI FP SPI master-in salve-out Comment 3.15.
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Smart Module Series SC606T Series Hardware Design Table 19: Pin Definition of LCM Interfaces Pin Name Pin No. I/O Description Comment LDO6_1P8 10 PO 1.8 V output Power supply for VDD of sensor, camera, LCD and I2C’s pull-up circuits. LDO17_2P85 12 PO 2.85 V output Power supply for VDD of LCD and camera.
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Smart Module Series SC606T Series Hardware Design DSI1_LN0_P 104 AO LCD1 MIPI lane 0 data (+) DSI1_LN1_N 107 AO LCD1 MIPI lane 1 data (-) DSI1_LN1_P 106 AO LCD1 MIPI lane 1 data (+) DSI1_LN2_N 109 AO LCD1 MIPI lane 2 data (-) DSI1_LN2_P 108 AO LCD1 MIPI lane 2 data (+) DSI1_LN3_N 111 AO LCD1 MIPI lane 3 data (-) DSI1_LN3_P 110 AO LCD1 MIPI lane 3 data (+) The following figures are reference designs for LCM interfaces.
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Smart Module Series SC606T Series Hardware Design LDO17_2P 85 LDO6_1P8 1 2 3 4 5 6 LCM1_LED+ LCM1_LEDLCD1_TE LCD1_RST PMU_MPP2 C1 C2 4.
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Smart Module Series SC606T Series Hardware Design VBAT LCM0 (1)_LED+ Backlight Driver PMU_MPP4/GPIO_33 LCM0 (1)_LED- C1 2.2 μF Module Figure 20: Reference Design for LCM External Backlight Driver 3.17. Touch Panel Interfaces The module provides two touch panel interfaces for connection with touch panel, and also provides the corresponding power pins and interrupt pins. The pin definition of the touch panel interfaces is illustrated below.
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Smart Module Series SC606T Series Hardware Design TP1_I2C_SCL 205 OD TP1 I2C clock 1.8 V power domain. TP1_I2C_SDA 204 OD TP1 I2C data 1.8 V power domain. A reference design for touch panel interfaces is shown below. LDO6_1P8 R1 LDO10_2P8 R2 2.2K 2.2K 1 2 3 4 5 6 TP_I2C_SDA TP_I2C_SCL TP_RST TP_INT D1 D2 D3 D4 C1 C2 SDA 1.8V SCL 1.8V RESET 1.8V INT 1.8V GND VDD 2.8V D5 4.
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Smart Module Series SC606T Series Hardware Design LDO6_1P8 10 PO 1.8 V output power for VDD of Sensor, Camera, LCD and I2C’s pull-up circuits LDO17_2P85 12 PO 2.85 V output power for VDD of LCD and Camera Vnom = 2.85 V IOmax = 300 mA LDO22_2P8 14 PO 2.8 V output power for AVDD of Camera Vnom = 2.8 V IOmax = 150 mA LDO23_1P2 15 PO 1.2 V output power for DVDD of front Camera. Vnom = 1.
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Smart Module Series SC606T Series Hardware Design CSI2_CLK_N 78 AI MIPI clock of front camera (-) CSI2_CLK_P 77 AI MIPI clock of front camera (+) CSI2_LN0_N 80 AI MIPI lane 0 data of front camera (-) CSI2_LN0_P 79 AI MIPI lane 0 data of front camera (+) CSI2_LN1_N 82 AI MIPI lane 1 data of front camera (-) CSI2_LN1_P 81 AI MIPI lane 1 data of front camera (+) CSI2_LN2_N 84 AI MIPI lane 2 data of front camera (-) CSI2_LN2_P 83 AI MIPI lane 2 data of front camera (+) CSI2_LN3_
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Smart Module Series SC606T Series Hardware Design 4.7 μF 4.7 μF 1 μF 1 μF LDO17_2P85 AF_VDD LDO22_2P8 AVDD LDO2_1P1 DVDD DOVDD LDO 6_1P8 2.2K Rear camera connector MCAM_ RST MCAM_PWDN MCAM_MCLK CAM_I2C_ SDA CAM_I2C_ SCL CSI0_LN3_P CSI0_LN3_N CSI0_LN2_P CSI0_LN2_N CSI0_LN1_P CSI0_LN1_N CSI0_LN0_P CSI0_LN0_N CSI0_ CLK_P CSI0_ CLK_N 2.2K EMI EMI EMI EMI EMI 4.
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Smart Module Series SC606T Series Hardware Design AVDD DOVDD EMI EMI EMI EMI EMI 1 μF DOVDD AVDD 4.7 μF LDO23_1P2 DVDD EMI CSI2_LN0_N CSI2_LN1_P CSI2_LN1_N EMI Front camera connector 1 μF CSI2_LN0_P EMI 4.7 μF 1 μF EMI EMI 2.2K Depth camera connector CSI1_LN0_P CSI1_LN0_N CSI1_CLK_P CSI1_CLK_N DCAM_RST DCAM_PWDN DCAM_MCLK DCAM_I2C_SDA _ DCAM_I2C_SCL 2.2K 2.2K LDO6_1P8 Rear camera connector DVDD LDO2_1P1 S CAM_ RST S CAM_ PWDN S CAM_ MCLK CSI2_ CLK_P CSI2_ CLK_N 4.
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Smart Module Series SC606T Series Hardware Design ⚫ ⚫ traces. For the same group of DSI or CSI signals, the length of all MIPI traces should be kept the same. In order to avoid crosstalk, keep the intra-lane spacing as wide as the MIPI trace and the inter-lane spacing two times the MIPI trace width. Avoid any cut or hole on the GND reference plane under MIPI signal traces. It is recommended to select a low capacitance TVS for ESD protection and the recommended parasitic capacitance is below 1 pF.
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Smart Module Series SC606T Series Hardware Design DSI1_LN2_N 109 14.86 -0.36 DSI1_LN2_P 108 14.5 DSI1_LN3_N 111 15.73 DSI1_LN3_P 110 15.88 CSI0_CLK_N 89 16.54 CSI0_CLK_P 88 16.57 CSI0_LN0_N 91 17.47 CSI0_LN0_P 90 17.4 CSI0_LN1_N 93 12.13 CSI0_LN1_P 92 12.08 CSI0_LN2_N 95 9.56 CSI0_LN2_P 94 9.7 CSI0_LN3_N 97 8.73 CSI0_LN3_P 96 8.86 CSI1_CLK_N 184 20.32 0.15 0.03 -0.07 -0.05 0.14 0.13 -0.23 CSI1_CLK_P 183 20.09 CSI1_LN0_N 186 12.09 CSI1_LN0_P 185 12.
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Smart Module Series SC606T Series Hardware Design CSI2_LN0_N 80 22.07 -0.07 CSI2_LN0_P 79 22.00 CSI2_LN1_N 82 22.54 CSI2_LN1_P 81 22.05 CSI2_LN2_N 84 22.03 -0.49 -0.11 CSI2_LN2_P 83 21.92 CSI2_LN3_N 86 21.90 CSI2_LN3_P 85 22.49 0.59 3.19. Sensor Interfaces The module communicates with sensors via the I2C interface, which supports the communication with various sensors such as acceleration sensors, gyroscopic sensors, compasses, optical sensors and temperature sensors.
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Smart Module Series SC606T Series Hardware Design Table 24: Pin Definition of Audio Interfaces Pin Name Pin No.
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Smart Module Series SC606T Series Hardware Design 3.20.1.
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Smart Module Series SC606T Series Hardware Design 3.20.2. Reference Design for Earpiece Interface C2 33 pF R1 EAR_P C1 0R 33 pF R2 EAR_N 0R D1 C3 D2 33 pF Module Figure 26: Reference Design for Earpiece Interface 3.20.3.
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Smart Module Series SC606T Series Hardware Design 3.20.4. Reference Design for Loudspeaker Interface F1 SPK_P EARP F2 EA SPK_N RN C1 C2 33 pF 33 pF D1 D2 Module Figure 28: Reference Design for Loudspeaker Interface 3.20.5. Design Considerations It is recommended to use the electret microphone with dual built-in capacitors (e.g. 10 pF and 33 pF) for filtering out RF interference, and thereby reducing TDD noise.
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Smart Module Series SC606T Series Hardware Design the reference design shown below.
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Smart Module Series SC606T Series Hardware Design 4 Wi-Fi and BT The module provides a shared antenna interface ANT_WIFI/BT for Wi-Fi and Bluetooth (BT) functions. The interface impedance is 50 Ω. External antennas such as the PCB antenna, the sucker antenna, and the ceramic antenna can be connected to the module via the interface to provide Wi-Fi and BT functions. 4.1. Wi-Fi Function Overview The module supports 2.4 GHz and 5 GHz dual-band WLAN wireless communications based on IEEE 802.
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Smart Module Series SC606T Series Hardware Design 802.11g 54 Mbps 14 dBm ±2.5 dB 802.11n HT20 MCS0 15 dBm ±2.5 dB 802.11n HT20 MCS7 13 dBm ±2.5 dB 802.11n HT40 MCS0 14 dBm ±2.5 dB 802.11n HT40 MCS7 13 dBm ±2.5 dB 802.11a 6Mbps 14 dBm ±2.5 dB 802.11a 54Mbps 13 dBm ±2.5 dB 802.11n HT20 MCS0 15 dBm ±2.5 dB 802.11n HT20 MCS7 13 dBm ±2.5 dB 802.11n HT40 MCS0 15 dBm ±2.5 dB 802.11n HT40 MCS7 13 dBm ±2.5 dB 802.11ac VHT20 MCS0 15 dBm ±2.5 dB 802.11ac VHT20 MCS8 13 dBm ±2.
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Smart Module Series SC606T Series Hardware Design 5 GHz 802.11n HT20 MCS7 -69 dBm 802.11n HT40 MCS0 -85 dBm 802.11n HT40 MCS7 -67 dBm 802.11a 6 Mbps -90 dBm 802.11a 54 Mbps -71 dBm 802.11n HT20 MCS0 -86 dBm 802.11n HT20 MCS7 -66 dBm 802.11n HT40 MCS0 -84 dBm 802.11n HT40 MCS7 -65 dBm 802.11ac VHT20 MCS8 -65 dBm 802.11ac VHT40 MCS9 -61 dBm 802.11ac VHT80 MCS9 -56 dBm The reference specifications are listed below: ⚫ ⚫ IEEE 802.
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Smart Module Series SC606T Series Hardware Design Table 27: BT Data Rate and Versions Version Data rate Maximum Application Throughput 1.2 1 Mbit/s > 80 kbit/s 2.0+EDR 3 Mbit/s > 80 kbit/s 3.0+HS 24 Mbit/s Refer to 3.0+HS 4.0 24 Mbit/s Refer to 4.0 LE 4.2 60 Mbit/s Refer to 4.2 LE The reference specifications are listed below: ⚫ ⚫ ⚫ Bluetooth Radio Frequency TSS and TP Specifications 1.2/2.0/2.0 + EDR/2.1/2.1+ EDR/3.0/3.
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Smart Module Series SC606T Series Hardware Design 5 GNSS The module integrates a GNSS engine (Gen 8C) which supports multiple positioning and navigation systems including GPS, GLONASS, and BeiDou. With an embedded LNA, the positioning accuracy of the module has been significantly improved. 5.1. GNSS Performance The following table lists the GNSS performance of the module in conduction mode. Table 29: GNSS Performance Parameter Sensitivity (GNSS) TTFF (GNSS) Static Drift (GNSS) Description Typ.
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Smart Module Series SC606T Series Hardware Design ⚫ ⚫ ⚫ ⚫ In user systems, GNSS RF signal traces and RF components should be placed far away from high-speed circuits, switched-mode power supplies, power inductors, the clock circuit of single-chip microcomputers, etc. For applications with a harsh electromagnetic environment or high ESD-protection requirements, it is recommended to add ESD protection diodes for the antenna interface. Only diodes with ultra-low junction capacitance such as 0.
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Smart Module Series SC606T Series Hardware Design 6 Antenna Interfaces The module provides five antenna interfaces for five types of antennas: the main antenna, the Rx-diversity/MIMO antenna, the GNSS antenna, the Wi-Fi/BT antenna and the FM antenna. Each antenna port has an impedance of 50 Ω. 6.1. Main and Rx-diversity Antenna Interfaces The pin definition of main/Rx-diversity antenna interfaces is shown below. Table 30: Pin Definition of Main and Rx-diversity Antenna Interfaces Pin Name Pin No.
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Smart Module Series SC606T Series Hardware Design LTE-FDD B5 869–894 824–849 MHz LTE-FDD B8 925–960 880–915 MHz LTE-FDD B11 1476–1496 1428–1448 MHz LTE-FDD B18 860–875 815–830 MHz LTE-FDD B19 875–890 830–845 MHz LTE-FDD B21 1496–1511 1448–1463 MHz LTE-FDD B26 758–788 703–733 MHz LTE-FDD B28A 758–788 703–733 MHz LTE-FDD B28B 773–803 718–748 MHz LTE-TDD B41 1) 2496–2690 2496–2690 MHz Table 32: SC606T-EM Operating Frequencies 3GPP Band Receive Transmit Unit GSM850
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Smart Module Series SC606T Series Hardware Design LTE-FDD B4 2110–2155 1710–1755 MHz LTE-FDD B5 869–894 824–849 MHz LTE-FDD B7 2620–2690 2500–2570 MHz LTE-FDD B8 925–960 880–915 MHz LTE-FDD B20 791–821 832–862 MHz LTE-FDD B28A 758–788 703–733 MHz LTE-FDD B28B 773–803 718–748 MHz LTE-TDD B38 2570–2620 2570–2620 MHz LTE-TDD B40 2300–2400 2300–2400 MHz LTE-TDD B41 1) 2496–2690 2496–2690 MHz Table 33: SC606T-NAD Operating Frequencies 3GPP Band Receive Transmit Unit W
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Smart Module Series SC606T Series Hardware Design LTE-FDD B26 859–894 814–849 MHz LTE-FDD B66 2110–2200 1710–1780 MHz LTE-FDD B71 617–652 663–698 MHz LTE-TDD B41 1) 2496–2690 2496–2690 MHz NOTE 1) The bandwidth of LTE-TDD B41 for SC606T-EM, SC606T-JP, SC606T-NAD is 200 MHz (2496–2690 MHz), and the corresponding uplink EARFCN ranges from 39650 to 41589. 6.1.1.
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Smart Module Series SC606T Series Hardware Design 6.1.2. Reference Designs for RF Layouts For the user’s PCB, the characteristic impedance of all RF traces should be controlled to 50 Ω. The impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant, the height from the reference ground to the signal layer (H), and the spacing between RF traces and grounds (S).
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Smart Module Series SC606T Series Hardware Design Figure 34: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) To ensure RF performance and reliability, the following principles should be complied with in RF layout design: ⚫ ⚫ ⚫ ⚫ ⚫ Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 Ω. The GND pins adjacent to RF pins should not be designed as thermal relief pins and should be fully connected to ground.
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Smart Module Series SC606T Series Hardware Design Table 35: Wi-Fi/BT and FM Frequency Type Frequency Unit 802.11a/b/g/n/ac 2402–2482 5180–5825 MHz BT 4.2 LE 2402–2480 MHz FM 76–108 MHz The reference circuit designs for the Wi-Fi/BT antenna interface and the FM antenna interface are shown below. A π-type matching circuit is recommended to be reserved for both interfaces for better RF performance. The capacitors are not mounted by default and resistors are 0 Ω.
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Smart Module Series SC606T Series Hardware Design Table 36: Pin Definition of GNSS Antenna Pin Name Pin No. I/O Description Comment ANT_GNSS 134 AI GNSS antenna Interface 50 Ω impedance GNSS_LNA_EN 202 DO LNA enable control For test purpose only. If unused, keep it open. Table 37: GNSS Frequency Type Frequency Unit GPS 1575.42 ±1.023 MHz GLONASS 1597.5–1605.8 MHz BeiDou 1561.098 ±2.046 MHz 6.3.1.
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Smart Module Series SC606T Series Hardware Design 6.3.2. Reference Design for Active Antenna The active antenna is powered by a 56 nH inductor through the antenna's signal path. The common power supply voltage ranges from 3.3 V to 5.0 V. Featuring low power consumption, the active antenna requires a stable and clean power. It is recommended to use a high-performance LDO to regulate the supply voltage for the active antenna. A reference design of GNSS active antenna is shown below.
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Smart Module Series SC606T Series Hardware Design Polarization Type: Vertical Cable Insertion Loss: < 1 dB (GSM850, EGSM900, WCDMA B5/B6/B8/B19, LTE B5/B8/B12/B13/B14/B17/B18/B19/B20/B26/B28A/B28B/B71) Cable Insertion Loss: < 1.
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Smart Module Series SC606T Series Hardware Design Figure 39: Dimensions of the U.FL-R-SMT Connector (Unit: mm) The U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT. Figure 40: Mechanicals of U.FL-LP Connectors The following figure describes the form factor of the mated connectors.
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Smart Module Series SC606T Series Hardware Design Figure 41: Form Factor of Mated Connectors (Unit: mm) For more details, please visit http://www.hirose.com.
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Smart Module Series SC606T Series Hardware Design 7 Reliability, Electrical and Radio Characteristics 7.1. Absolute Maximum Ratings The absolute maximum ratings of the power and voltage supplied to the digital and analog pins of the module are listed in the following table. Table 39: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT -0.5 6 V USB_VBUS -0.3 10 V 0 3 A 2.16 V Current on VBAT Voltage on Digital Pins -0.3 7.2.
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Smart Module Series SC606T Series Hardware Design IVBAT Peak supply current (during a transmission slot) Maximum power control level at EGSM900 USB_VBUS VRTC Supply voltage of a backup battery - 1.8 3.0 A 4.0 5.0 6.0 V 2.0 3.0 3.25 V 7.3. Operating and Storage Temperatures The operating and storage temperatures are listed in the following table. Table 41: Operating and Storage Temperatures Parameter Min. Typ. Max.
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Smart Module Series SC606T Series Hardware Design @ DRX=8 LTE-FDD supply current LTE-TDD supply current Sleep (USB disconnected) @ DRX = 9 3.0 mA Sleep (USB disconnected) @ DRX = 6 4.13 mA Sleep (USB disconnected) @ DRX = 8 3.15 mA Sleep (USB disconnected) @ DRX = 6 3.95 mA Sleep (USB disconnected) @ DRX = 8 3.
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Smart Module Series SC606T Series Hardware Design LTE-FDD B19 @ max power 540 mA LTE-FDD B21 @ max power 560 mA LTE-FDD B26 @ max power 570 mA LTE-FDD B28A @ max power 680 mA LTE-FDD B28B @ max power 625 mA LTE-TDD B41 @ max power 530 mA Table 43: SC606T-EM Current Consumption Description Conditions Typ. Unit OFF state Power down 80 μA Sleep (USB disconnected) @ DRX = 2 4.5 mA Sleep (USB disconnected) @ DRX = 5 3.
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Smart Module Series SC606T Series Hardware Design WCDMA voice call GPRS data transfer EGSM900 @ PCL 5 280 mA EGSM900 @ PCL 12 120 mA EGSM900 @ PCL 19 100 mA DCS1800 @ PCL 0 210 mA DCS1800 @ PCL 7 140 mA DCS1800 @ PCL 15 130 mA PCS1900 @ PCL 0 210 mA PCS1900 @ PCL 7 130 mA PCS1900 @ PCL 15 125 mA B1 @ max power 620 mA B2 @ max power 550 mA B4 @ max power 580 mA B5 @ max power 590 mA B8 @ max power 560 mA GSM850 (1UL/4DL) @ PCL 5 240 mA GSM850 (2UL/3DL) @ PCL 5
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Smart Module Series SC606T Series Hardware Design DCS1800 (4UL/1DL) @ PCL 0 420 mA PCS1900 (1UL/4DL) @ PCL 0 190 mA PCS1900 (2UL/3DL) @ PCL 0 290 mA PCS1900 (3UL/2DL) @ PCL 0 370 mA PCS1900 (4UL/1DL) @ PCL 0 420 mA GSM850 (1UL/4DL) @ PCL 8 170 mA GSM850 (2UL/3DL) @ PCL 8 250 mA GSM850 (3UL/2DL) @ PCL 8 320 mA GSM850 (4UL/1DL) @ PCL 8 370 mA EGSM900 (1UL/4DL) @ PCL 8 170 mA EGSM900 (2UL/3DL) @ PCL 8 260 mA EGSM900 (3UL/2DL) @ PCL8 340 mA EGSM900 (4UL/1DL) @ PCL 8 380 mA
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Smart Module Series SC606T Series Hardware Design LTE data transfer B8 (HSDPA) @ max power 510 mA B1 (HSUPA) @ max power 580 mA B2 (HSUPA) @ max power 530 mA B4 (HSUPA) @ max power 550 mA B5 (HSUPA) @ max power 520 mA B8 (HSUPA) @ max power 520 mA LTE-FDD B1 @ max power 550 mA LTE-FDD B2 @ max power 530 mA LTE-FDD B3 @ max power 650 mA LTE-FDD B4 @ max power 530 mA LTE-FDD B5 @ max power 560 mA LTE-FDD B7 @ max power 680 mA LTE-FDD B8 @ max power 550 mA LTE-FDD B20 @
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Smart Module Series SC606T Series Hardware Design Table 44: SC606T-JP RF Output Power Frequency Max. Min.
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Smart Module Series SC606T Series Hardware Design WCDMA B1 24 dBm +1/-3 dB < -49 dBm WCDMA B2 24 dBm +1/-3 dB < -49 dBm WCDMA B4 24 dBm +1/-3 dB < -49 dBm WCDMA B5 24 dBm +1/-3 dB < -49 dBm WCDMA B8 24 dBm +1/-3 dB < -49 dBm LTE-FDD B1 23 dBm ±2 dB < -39 dBm LTE-FDD B2 23 dBm ±2 dB < -39 dBm LTE-FDD B3 23 dBm ±2 dB < -39 dBm LTE-FDD B4 23 dBm ±2 dB < -39 dBm LTE-FDD B5 23 dBm ±2 dB < -39 dBm LTE-FDD B7 23 dBm ±2 dB < -39 dBm LTE-FDD B8 23 dBm ±2 dB < -39 dBm LTE-FDD B20
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Smart Module Series SC606T Series Hardware Design LTE-FDD B4 23 dBm ±2 dB < -39 dBm LTE-FDD B5 23 dBm ±2 dB < -39 dBm LTE-FDD B7 23 dBm ±2 dB < -39 dBm LTE-FDD B12 23 dBm ±2 dB < -39 dBm LTE-FDD B13 23 dBm ±2 dB < -39 dBm LTE-FDD B14 23 dBm ±2 dB < -39 dBm LTE-FDD B17 23 dBm ±2 dB < -39 dBm LTE-FDD B25 23 dBm ±2 dB < -39 dBm LTE-FDD B26 23 dBm ±2 dB < -39 dBm LTE-FDD B66 23 dBm ±2 dB < -39 dBm LTE-FDD B71 23 dBm ±2 dB < -39 dBm LTE-TDD B41 23 dBm ±2 dB < -39 dBm NOTE In
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Smart Module Series SC606T Series Hardware Design WCDMA B8 -109.5 -109.5 -111 -104.7 dBm WCDMA B19 -109.5 -108 -110.5 -106.7 dBm LTE-FDD B1 (10 MHz) -97 -98 -99.5 -96.3 dBm LTE-FDD B3 (10 MHz) -97 -97 -99.5 -93.3 dBm LTE-FDD B5 (10 MHz) -97 -97 -99 -94.3 dBm LTE-FDD B8 (10 MHz) -97 -97 -99.5 -93.3 dBm LTE-FDD B11 (10 MHz) -96 -97 -99 -96.3 dBm LTE-FDD B18(10 MHz) -97 -98 -100 -96.3 dBm LTE-FDD B19 (10 MHz) -97 -98 -100 -96.3 dBm LTE-FDD B21(10 MHz) -97 -96.
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Smart Module Series SC606T Series Hardware Design WCDMA B5 -109.5 -108 -110.5 -104.7 dBm WCDMA B8 -109 -109 -110.5 -104.7 dBm LTE-FDD B1 (10 MHz) -97 -97 -100 -96.3 dBm LTE-FDD B2 (10 MHz) -97 -97 -100 -94.3 dBm LTE-FDD B3 (10 MHz) -96.5 -96.5 -99 -93.3 dBm LTE-FDD B4 (10 MHz) -97 -97 -100 -96.3 dBm LTE-FDD B5 (10 MHz) -97.5 -98 -100 -94.3 dBm LTE-FDD B7 (10 MHz) -96 -96 -99 -94.3 dBm LTE-FDD B8 (10 MHz) -97.5 -97.5 -100.5 -93.3 dBm LTE-FDD B20 (10 MHz) -96.
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Smart Module Series SC606T Series Hardware Design LTE-FDD B7 (10 MHz) -96 -96 -98 -94.3 dBm LTE-FDD B12 (10 MHz) -96 -97.5 -98.5 -93.3 dBm LTE-FDD B13 (10 MHz) -95.5 -97.5 -98 -93.3 dBm LTE-FDD B14 (10 MHz) -97 -97 -99 -93.3 dBm LTE-FDD B17 (10 MHz) -96 -97 -98 -93.3 dBm LTE-FDD B25 (10 MHz) -97 -97 -99 -92.8 dBm LTE-FDD B26 (10 MHz) -97.5 -98 -99.5 -93.8 dBm LTE-FDD B66 (10 MHz) -97 -96.5 -98.5 -95.8 dBm LTE-FDD B71 (10 MHz) -96.5 -96.5 -99 -93.
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Smart Module Series SC606T Series Hardware Design 8 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimension tolerances are ±0.05 mm unless otherwise specified. 8.1.
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Smart Module Series SC606T Series Hardware Design Figure 43: Bottom Dimensions (Perspective View) NOTE The package warpage level of the module conforms to JEITA ED-7306 standard.
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Smart Module Series SC606T Series Hardware Design 8.2. Recommended Footprint Figure 44: Recommended Footprint (Perspective View) NOTES 1. 2. For easy maintenance of the module, keep about 3 mm between the module and other components on the host PCB. All RESERVED pins should be kept open and MUST NOT be connected to ground.
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Smart Module Series SC606T Series Hardware Design 8.3. Top and Bottom Views of the Module Figure 45: Top and Bottom Views NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel.
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Smart Module Series SC606T Series Hardware Design 9 Storage, Manufacturing and Packaging 9.1. Storage The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 ±5 °C and the relative humidity should be 35–60%. 2. The storage life (in vacuum-sealed packaging) is 12 months in Recommended Storage Condition. 3.
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Smart Module Series SC606T Series Hardware Design NOTES 1. 1) This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. 2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the module to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or the relative moisture is over 60%, It is recommended to start the solder reflow process within 24 hours after the package is removed.
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Smart Module Series SC606T Series Hardware Design Table 51: Recommended Thermal Profile Parameters Factor Recommendation Soak Zone Max slope 1–3 °C/s Soak time (between A and B: 150°C and 200°C) 70–120 s Reflow Zone Max slope 2–3 °C/s Reflow time (D: over 220°C) 45–70 s Max temperature 238 °C to 246 °C Cooling down slope -1.5 to -3 °C/s Reflow Cycle Max reflow cycle 1 NOTES 1.
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Smart Module Series SC606T Series Hardware Design Figure 47: Tape Dimensions Figure 48: Reel Dimensions Table 52: Reel Packaging Model Name SC606T series MOQ for MP Minimum Package: 200 pcs 200 Size: 398 mm × 383 mm × 83 mm Size: 420 mm × 350 mm × 405 mm N.W: 1.92 kg N.W: 8.18 kg G.W: 3.67 kg G.W: 15.
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Smart Module Series SC606T Series Hardware Design 10 Appendix A References Table 53: Related Documents SN Document Name Description [1] Quectel_Smart_EVB-G2_User_Guide EVB User Guide for SC606T Series [2] Quectel_SC606T_Series_GPIO_Configuration GPIO Configuration of SC606T Series [3] Quectel_RF_Layout_Application_Note RF Layout Application Note [4] Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide [5] Quectel_SC606T_Series_Reference_Design Reference Design for SC606T
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Smart Module Series SC606T Series Hardware Design DL Downlink DRX Discontinuous Reception DSP Digital Signal Processor ECM Electret Condenser Microphone EDR Enhanced Data Rate EFR Enhanced Full Rate EGSM Extended GSM900 band (includes standard GSM900 band) ERM Eccentric Rotating Mass eSCO Extended Synchronous Connection Oriented ESD Electrostatic Discharge ESR Equivalent Series Resistance FEM Front-End Module FM Frequency Modulation FR Full Rate GLONASS Globalnaya Navigazionnay
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Smart Module Series SC606T Series Hardware Design LCD Liquid Crystal Display LCM LCD Module LED Light Emitting Diode LGA Land Grid Array LNA Low Noise Amplifier LRA Linear Resonant Actuator LTE-TDD Long-Term Evolution Time-Division Duplex MAC Medium Access Control MCS Modulation and Coding Scheme MEMS Micro-Electro-Mechanical System MIMO Multiple Input Multiple Output MIPI Mobile Industry Processor Interface MO Mobile Originated/Origination MP Megapixel MT Mobile Terminal/Termi
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Smart Module Series SC606T Series Hardware Design RGB Red-Green-Blue RH Relative Humidity RHCP Right Hand Circularly Polarized RTC Real Time Clock RTS Request to Send Rx Receive SCO Synchronous Connection Oriented SMS Short Message Service SPI Serial Peripheral Interface STA Station TDD Time Division Distortion TE Terminal Equipment TP Touch Panel TX Transmitting Direction UART Universal Asynchronous Receiver & Transmitter UL Uplink UMTS Universal Mobile Telecommunications
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Smart Module Series SC606T Series Hardware Design VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access WLAN Wireless Local Area Network WLED White Light-Emitting Diode WUXGA Widescreen Ultra Extended Graphics Array SC606T_Series_Hardware_Design 115 / 116
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Smart Module Series SC606T Series Hardware Design 11 Appendix B GPRS Coding Schemes Table 55: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 CS-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
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Smart Module Series SC606T Series Hardware Design 12 Appendix C GPRS Multi-slot Classes Thirty-three classes of GPRS multi-slot modes are defined for MS in GPRS specifications. The multi-slot class varies from product to product, and determines the maximum achievable data rates in both uplink and downlink directions. The numbers in the column of active slots are the total number of slots the GPRS device can use simultaneously for both uplink and downlink communications.
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Smart Module Series SC606T Series Hardware Design 15 5 5 NA 16 6 6 NA 17 7 7 NA 18 8 8 NA 19 6 2 NA 20 6 3 NA 21 6 4 NA 22 6 4 NA 23 6 6 NA 24 8 2 NA 25 8 3 NA 26 8 4 NA 27 8 4 NA 28 8 6 NA 29 8 8 NA 30 5 1 6 31 5 2 6 32 5 3 6 33 5 4 6 SC606T_Series_Hardware_Design 118 / 116
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Smart Module Series SC606T Series Hardware Design 13 Appendix D EDGE Modulation and Coding Schemes Table 57: EDGE Modulation and Coding Schemes Coding Schemes Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot MCS-1 GMSK C 8.80 kbps 17.60 kbps 35.20 kbps MCS-2 GMSK B 11.2 kbps 22.4 kbps 44.8 kbps MCS-3 GMSK A 14.8 kbps 29.6 kbps 59.2 kbps MCS-4 GMSK C 17.6 kbps 35.2 kbps 70.4 kbps MCS-5 8-PSK B 22.4 kbps 44.8 kbps 89.6 kbps MCS-6 8-PSK A 29.6 kbps 59.