Product Info

1
.
2
.
EG95_Seri
e
.
It is rec
o
PCM_C
L
.
EG95 w
o
3.13. S
P
SPI interfa
c
link with th
e
voltage is 1
The followi
n
Table 15:
P
Pin Name
SPI_CLK
SPI_MOS
I
NOTES
e
s_Hardw
a
PCM_
D
PCM_D
O
PCM_S
Y
PCM_
C
I2C_
S
I2C_
S
Module
Figure 24:
o
mmended
t
L
K.
o
rks as a m
a
P
I Interf
a
c
e of EG95a
c
e
peripheral
.8 V with cl
o
n
g table sho
P
in Definiti
o
Pin
N
26
I
27
a
re_Design
D
IN
O
U
T
Y
NC
C
LK
S
CL
S
DA
4
7
K
1.8 V
Referenc
e
t
o reserve
a
a
ster devic
e
a
ce
c
ts asthe m
a
devices. It
o
ck rates up
ws the pin
d
o
n of SPI In
N
o. I/O
DO
DO
4
.
7
K
4.7K
e
Circuit of
P
a
n RC (R =
2
e
pertaining
t
a
ster only. I
t
isdedicated
to 50MHz.
d
efinition of
S
terface
Descri
Clock
s
Maste
r
interfa
c
5
BCL
K
LRC
K
DAC
ADC
SCL
SDA
P
CM and I
2
2
2Ω, C = 2
2
t
o I2C inter
f
t
provides a
to one-to-
o
S
PI interfac
ption
s
ignal o
f
SP
r
output slav
c
e
5
4 / 103
K
K
Code
c
2
C
A
pplicat
2
pF) circuit
f
ace.
duplex, syn
o
ne connect
e.
I interface
e input of S
P
LTE St
a
EG95 Se
r
MICBIAS
INP
INN
LOUTP
LOUTN
c
ion with A
u
on the PC
M
chronous a
n
ion, without
c
Com
m
1.8 V
p
P
I
1.8 V
p
a
ndard Mo
d
r
ies Hard
w
u
dio Codec
M
lines, esp
e
n
d serial co
m
c
hip select.
m
ent
p
ower dom
a
p
ower dom
a
d
ule Serie
s
w
are Desig
n
B
I
A
S
e
cially for
m
municatio
n
Its operatio
n
a
in
a
in
s
n
n
n