Product Info

EG95_Seri
e
A common
customer’s
M
should bea
d
resistors ar
e
not mounte
must be pl
a
Theextra st
u
The followi
n
specificatio
n
 It is im
p
of US
B
 Do not
import
a
and lo
w
 Juncti
o
please
less th
a
 Keep t
h
3.11. U
A
The modul
e
following s
h
e
s_Hardw
a
USB_D
P
USB_D
M
GN
D
Module
USB_VBU
S
mode ch
o
M
CU in ord
e
d
ded in seri
e
d by defaul
t
a
ced close
u
bs of trace
n
g principle
s
n
.
p
ortant to ro
B
differential
route sign
a
a
nt to route
w
er laye
r
s b
u
o
n capacitan
pay attenti
o
a
n 2pF.
h
e ESD pro
t
A
RT Int
e
e
provides t
w
h
ows their f
e
a
re_Design
P
M
D
Minimize t
h
S
VDD
Figur
e
o
ke L1 is
e
r to suppre
s
es betwee
n
t
. In order t
o
to the mod
must be a
s
s
should be
c
ute the US
B
trace is 90
Ω
a
l traces un
the USB di
u
t also right
ce of the E
S
o
n to the s
e
t
ection com
p
e
rfaces
w
o UART in
e
atures.
L1
Close to M
R3
R4
h
ese stubs
e
19: Refer
e
recommen
d
s
s EMI spu
r
n
the modul
e
o
ensure th
ule, and al
s
s
short as p
o
c
omplied wi
B
signal trac
e
Ω
.
der crystal
s
fferential tr
a
and left sid
e
S
D protectio
e
lection of t
h
p
onents to t
terfaces: th
e
4
odule
NM_0R
NM_0R
e
nce Circui
t
d
ed to be
r
ious transm
e
and the t
e
e integrity
o
s
o these re
o
ssible.
th when de
s
e
s as differ
e
s
, oscillator
s
a
ces in inn
e
e
s.
n compone
n
h
e compon
e
he USB co
n
e
main UA
R
4
9 / 103
Test Points
ESD Array
t
of USB In
t
added in
ission. Mea
e
st points s
o
o
f USB dat
a
sistors sho
u
s
ign the US
B
e
ntial pairs
w
s
, magnetic
er
-layer with
n
t might ca
u
e
nt. Typical
l
n
nector as c
l
R
T interface
LTE St
a
EG95 Se
r
US
B
US
B
GN
D
t
erface
series bet
w
nwhile, the
0
o
as to facili
t
a
line signal
,
u
ld be plac
e
B
interface,
w
ith total gr
o
devices an
d
ground shi
e
u
se influenc
e
l
y, the stra
y
l
ose as pos
s
and thedeb
a
ndard Mo
d
r
ies Hard
w
B
_DP
B
_DM
D
MCU
w
een the
m
0
Ω resistor
s
t
ate debug
g
,
L1/R3/R4
e
d close to
so as to m
e
o
unding. Th
e
d
RF signal
e
lding onn
o
e
s on USB
d
y
capacitan
c
s
ible.
ug UART i
n
d
ule Serie
s
w
are Desig
n
m
odule an
d
s
(R3 and R
4
g
ing, and th
e
component
s
each othe
r
e
et USB 2.0
e
impedanc
e
traces. It i
s
o
t only uppe
d
ata lines, s
o
c
e should b
e
n
terface. Th
e
s
n
d
4
)
e
s
r
.
e
s
r
o
e
e