User's Manual

LTE Module Series
EC25Hardware Design
EC25_Hardware_DesignConfidential / Released 51 / 90
The RI behavior can be changed by AT+QCFG=“urc/ri/ring” command. Please refer to document [2]
for details.
3.17. SGMII Interface
EC25 includes an integrated Ethernet MAC with an SGMII interface and twomanagement interfaces,key
features of the SGMII interface are shown below:
 IEEE802.3 compliance
 Full duplex at 1000Mbps
 Half/full duplex for 10/100Mbps
 Support VLAN tagging
 Support IEEE1588 and Precision Time Protocol(PTP)
 Can be used to connect toexternal Ethernet PHY like AR8033, or to an external switch
 Management interfaces support dual voltage 1.8V/2.85V
The following table shows the pin definition of SGMII interface.
Table 21: Pin Definition of the SGMII Interface
Pin Name Pin No. I/O Description Comment
Control Signal Part
EPHY_RST_N 119 DO Ethernet PHY reset 1.8V/2.85V power domain
EPHY_INT_N 120 DI Ethernet PHY interrupt 1.8V power domain
SGMII_MDATA 121 IO
SGMII MDIO(Management Data
Input/Output) data
1.8V/2.85V power domain
SGMII_MCLK 122 DO
SGMII MDIO (Management Data
Input/Output) clock
1.8V/2.85V power domain
USIM2_VDD 128 PO
SGMII MDIO pull-up power
source
Configurable power source.
1.8V/2.85V power domain.
External pull-up power source for
SGMII MDIO pins.
SGMII Signal Part
SGMII_TX_M 123 AO SGMII transmission-minus
Connect with a 0.1uF capacitor,
close to the PHY side.
SGMII_TX_P 124 AO SGMII transmission-plus
Connect with a 0.1uF capacitor,
close to the PHY side.