User's Manual

LTE Module Series
EC21 Hardware Design
EC21_Hardware_Design Confidential / Released 44 / 94
Table 13:Logic Levels of Digital I/O
Parameter Min. Max. Unit
V
IL
-0.3 0.6 V
V
IH
1.2 2.0 V
V
OL
0 0.45 V
V
OH
1.35 1.8 V
The module provides 1.8V UART interface. A level translator should be used if your application is
equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instrumentis
recommended. The following figure shows areference design.
Figure 20: Reference Circuit with Translator Chip
Please visithttp://www.ti.com
for more information.
Another example with transistor translation circuit is shown as below. The circuit design of dotted line
section can refer to the design of solid line section, in terms of both module input and output circuit
designs; but please pay attention to the direction of connection.