User's Manual

LTE Module Series
BG96-NA Hardware Design
BG96-NA_Hardware_Design Confidential / Released 38 / 64
MCU/ARM
TXD
RXD
VDD_EXT
10K
VCC_MCU
4.7K
10K
VDD_EXT
TXD
RXD
RTS
CTS
DTR
RI
RTS
CTS
GND
GPIO DCD
Module
GPIO
EINT
VDD_EXT
4.7K
GND
1nF
1nF
Figure 19: Reference Circuit with Transistor Circuit
Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps.
3.12. I2C Interfaces
BG96-NA provides one I2C interface.
The following table shows the pin definition of I2C interfaces which can be applied on audio codec design.
Table 14: Pin Definition of I2C Interfaces
Pin Name
Pin No.
I/O
Description
Comment
I2C_SCL
40
OD
I2C serial clock
Require external pull-up to 1.8V
I2C_SDA
41
OD
I2C serial data
Require external pull-up to 1.8V
NOTE