Product Info

PCM_OU
T
PCM_SY
N
PCM_CL
K
I2C_SCL
I2C_SDA
Clock and
m
short sync
d
command
A
The followi
n
1. It is r
e
PCM_
C
2. EC25
w
NOTES
E
T
25
N
C 26
K
27
41
42
m
ode can b
e
d
ata format
w
A
T+QDAI fo
r
n
g figure sh
o
P
PC
PC
M
P
C
I
2
I
2
Modu
l
Figur
e
e
commende
d
C
LK.
w
orks as a
m
E
C25-A_U
s
DO
IO
IO
OD
OD
e
configure
d
w
ith 2048k
H
r
details.
o
ws the ref
e
P
C
M
_IN
M
_OUT
M
_SYNC
CM
_CLK
2
C_SCL
2
C_SDA
l
e
1.8V
e
24: Refer
e
d
to reserv
e
m
aster devi
c
s
e
r
_Manual
C
PCM d
PCM d
PCM d
I2C se
r
I2C se
r
d
by AT co
m
H
zPCM_CL
K
e
rence desi
g
4.7K 4.7K
e
nce Circui
e
RC (R=2
c
e pertainin
g
C
onfidenti
a
ata output
ata frame s
y
ata bit cloc
k
r
ial clock
r
ial data
m
mand, and
K
and 8kHz
g
n of PCM i
n
BCLK
LRCK
DAC
ADC
SCL
SDA
t of PCM A
2ohm, C=2
g
to I2C inte
a
l / Release
y
nc signal
k
the default
PCM_SYN
C
n
terface wit
h
MI
L
Codec
p
plication
w
2pF) circui
t
rface.
d 40 /
6
1.8V pow
e
1.8V pow
e
1.8V pow
e
Require
e
Require
e
configurati
o
C
. Refer to
d
h
external c
o
CBIAS
INP
INN
LOUT
P
L
OUTN
w
ith Audio
t
on the P
C
L
EC25-AU
6
9
e
r domain
e
r domain
e
r domain
e
xternal pull
-
e
xternal pull
-
o
n is master
d
ocument
[
o
dec IC.
BIAS
Codec
C
M lines, e
L
TE Modul
e
ser Manu
a
-
up to 1.8V
-
up to 1.8V
mode usin
g
[
2] about th
e
specially fo
e
a
l
g
e
r