User's Manual

LTE Module
EC20 Hardware Design
EC20_Hardware_Design Confidential / Released 38 / 83
RTS
65
DI
Request to send
1.8V power domain
DTR
66
DI
Sleep mode control
1.8V power domain
TXD
67
DO
Transmit data
1.8V power domain
RXD
68
DI
Receive data
1.8V power domain
Table 12: Pin Definition of the Debug UART Interface
Pin Name
Pin No.
I/O
Description
Comment
DBG_TXD
12
DO
Transmit data
1.8V power domain
DBG_RXD
11
DI
Receive data
1.8V power domain
The logic levels are described in the following table.
Table 13: Logic Levels of Digital I/O
Parameter
Min.
Max.
Unit
V
IL
-0.3
0.6
V
V
IH
1.2
2.0
V
V
OL
0
0.45
V
V
OH
1.35
1.8
V
Module provides 1.8V UART interface. A level translator should be used if your application is equipped
with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instrument is
recommended. The following figure shows the reference design.