User's Manual

UMTS/HSPA Module Series
UC20 User Manual
UC20_Hardware_Design Confidential / Released 48 / 84
The following table shows the pin definition of PCM and I2C interface which can be applied on audio
codec design.
Table 14: Pin Definition of PCM and I2C Interface
Pin Name
Pin No.
I/O
Description
Comment
PCM_IN
24
DI
PCM data input.
1.8V power domain.
PCM_OUT
25
DO
PCM data output.
1.8V power domain.
PCM_SYNC
26
IO
PCM data frame sync signal.
1.8V power domain.
PCM_CLK
27
IO
PCM data bit clock.
1.8V power domain.
I2C_SCL
41
OD
I2C serial clock.
Require external pull-up
resistor. 1.8V only.
I2C_SDA
42
OD
I2C serial data.
Require external pull-up
resistor. 1.8V only.
Clock and mode can be configured by AT command, and the default configuration is master mode using
short sync data format with 2048kHz PCM_CLK and 8kHz PCM_SYNC. In addition, UC20’s firmware has
integrated the configuration on NAU8814 application with I2C interface. Refer to document [1] about the
command AT+QDAI for details.
The following figure shows the reference design of PCM interface with external codec IC.
PCM_IN
PCM_OUT
PCM_SYNC
PCM_CLK
I2C_SCL
I2C_SDA
NAU8814
Module
1.8V
4.7K 4.7K
BCLK
MCLK
FS
DACIN
ADCOUT
SCLK
SDIN
BIAS
MIC_BIAS
MIC+
MIC-
SPKOUT+
SPKOUT-
Figure 28: Reference Circuit of PCM Application with Audio Codec