User's Manual

Table Of Contents
UMTS/HSPA Module Series
UG96 Hardware Design
UG96_Hardware_Design Confidential / Released 46 / 75
In general, the BitClockFrequency (BCLK) is calculated by the following expression:
BitClockFrequency=(DataWordBit +1) × SamplingFrequency
The following figure shows the reference design of PCM interface with external codec IC.
PCM_IN
PCM_OUT
PCM_SYNC
PCM_CLK
I2C_SCL
I2C_SDA
CODEC
Module
VDD_EXT
1K
1K
BCLK
LRCLK
DACDAT
ADCDAT
SCL
SDA
BIAS
MICBIAS
MIC+
MIC-
SPK+
SPK-
CLK_OUT MCLK
Rs
NM
Figure 28: Reference Circuit of PCM Application with Audio Codec
1. It is recommended to reserve RC (e.g. R=22Ω, C=22pF) circuit on the PCM lines, especially for
PCM_CLK.
2. UG96 module provides a digital clock output (CLK_OUT) for an external audio codec, the CLK_OUT
function is disabled by default. When CLK_OUT is required, AT command is used to provide the
codec with a 13/26MHz clock generated from the module. Refer to document [1] for details. If
unused, keep this pin open.
3. A RC (e.g. R=22Ω, C=47pF) circuit is recommended to be reserved on CLK_OUT line. If external
audio CODEC is MAX9860 or NAU8814, the RC circuit should be mounted, if it is ALC5616, then it is
not mounted.
NOTES