UG95 Hardware Design UMTS/HSPA Module Series Rev. UG95_Hardware_Design_FCC Date: 2014-09-02 www.quectel.
UMTS/HSPA Module Series UG95 Hardware Design Our aim is to provide customers with timely and comprehensive service. For any assistance, please contact our company headquarters: Quectel Wireless Solutions Co., Ltd. Office 501, Building 13, No.99, Tianzhou Road, Shanghai, China, 200233 Tel: +86 21 5108 6236 Mail: info@quectel.com Or our local office, for more information, please visit: http://www.quectel.com/support/salesupport.
UMTS/HSPA Module Series UG95 Hardware Design About the Document History Revision Date Author Description 1.0 2014-06-20 Yeoman CHEN Initial 1. 2. 1.1 2014-08-21 UG95_Hardware_Design Yeoman CHEN Updated transmitting power information. Added reference design for power supply in Chapter 3.6.3. 3. Updated timing of turning on module in Figure 9. 4. Added definition for the backup capacitor value in Chapter 3.9. 5. Added reference design of 5V level match circuit in Figure 18. 6.
UMTS/HSPA Module Series UG95 Hardware Design Contents About the Document ................................................................................................................................... 2 Contents ....................................................................................................................................................... 3 Table Index .................................................................................................................................
UMTS/HSPA Module Series UG95 Hardware Design 3.11.1. USIM Card Application ................................................................................................... 37 3.11.2. Design Considerations for USIM Card Holder ............................................................... 39 3.12. USB Interface .......................................................................................................................... 41 3.13. PCM and I2C Interface .........................................
UMTS/HSPA Module Series UG95 Hardware Design Table Index TABLE 1: UG95 SERIES FREQUENCY BANDS ................................................................................................ 9 TABLE 2: UG95 KEY FEATURES ..................................................................................................................... 10 TABLE 3: IO PARAMETERS DEFINITION ........................................................................................................ 16 TABLE 4: PIN DESCRIPTION ...
UMTS/HSPA Module Series UG95 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 13 FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 15 FIGURE 3: UART SLEEP APPLICATION .........................................................................................................
UMTS/HSPA Module Series UG95 Hardware Design 1 Introduction This document defines the UG95 module and describes its hardware interface which are connected with your application and the air interface. This document can help you quickly understand module interface specifications, electrical and mechanical details. Associated with application notes and user guide, you can use UG95 module to design and set up mobile applications easily.
UMTS/HSPA Module Series UG95 Hardware Design 1.1. Safety Information The following safety precautions must be observed during all phases of the operation, such as usage, service or repair of any cellular terminal or mobile incorporating UG95 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel and to incorporate these guidelines into all manuals supplied with the product.
UMTS/HSPA Module Series UG95 Hardware Design 2 Product Concept 2.1. General Description UG95 serials are embedded 3G wireless communication modules, support UTMS/HSDPA/HSUPA networks. It can also provide voice functionality1) for your specific application. UG95 offers a maximum data rate of 7.2Mbps on downlink and 5.76Mbps on uplink in HSPA mode.
UMTS/HSPA Module Series UG95 Hardware Design The Host system using UG95 should have label “contains FCC ID: XMR201408UG95”. 2.2.1. FCC Statement Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. 2.2.2. FCC Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment.
UMTS/HSPA Module Series UG95 Hardware Design Transmitting Power Class 3 (22.25Bm+1/-1dB) for UMTS 850/1900. HSPA/UMTS Features HSPA data rate is corresponded with 3GPP release 6 7.2Mbps on downlink and 5.76Mbps on uplink. WCDMA data rate is corresponded with 3GPP R4. 384kbps on downlink and 384kbps on uplink. Support both QPSK and 16-QAM modulations. Internet Protocol Features Support TCP/UDP/PPP protocols.
UMTS/HSPA Module Series UG95 Hardware Design Restricted operation: -40°C ~ -35°C and +70°C ~ +85°C 1). Storage temperature: -45°C ~ +90°C. Firmware Upgrade USB interface or UART interface. RoHS All hardware components are fully compliant with EU RoHS directive. NOTES 1. 1) means when the module works within this temperature range, RF performance might degrade. For example, the frequency error or the phase error would increase. 2. * means this feature is under development. 2.4.
UMTS/HSPA Module Series UG95 Hardware Design Figure 1: Functional Diagram 2.5. Evaluation Board In order to help you to develop applications with UG95, Quectel supplies an evaluation board (UC20-EVB), RS-232 to USB cable, USB data cable, power adapter, earphone, antenna and other peripherals to control or test the module. For details, please refer to document [2].
UMTS/HSPA Module Series UG95 Hardware Design 3 Application Interface 3.1. General Description UG95 is equipped with a 62-pin 1.1mm pitch SMT pads plus 40-pin ground pads and reserved pads that connect to customer’s cellular application platform.
UMTS/HSPA Module Series UG95 Hardware Design 3.2. Pin Assignment RESERVED GND GND GND RESERVED VRTC GND 54 VBAT_RF GND 55 VBAT_RF GND RF_ANT 56 50 57 51 58 52 59 53 60 62 61 GND The following figure shows the pin assignment of the UG95 module.
UMTS/HSPA Module Series UG95 Hardware Design 3.3. Pin Description The following tables show the UG95’s pin definition. Table 3: IO Parameters Definition Type Description IO Bidirectional input/output DI Digital input DO Digital output PI Power input PO Power output AI Analog input AO Analog output OD Open drain Table 4: Pin Description Power Supply Pin Name VBAT_BB VBAT_RF VRTC Pin No.
UMTS/HSPA Module Series UG95 Hardware Design VDD_EXT GND 29 PO 3,31,48, 50,54,55, 58,59,61, 62,67~74, 79~82, 89~91, 100~102 Provide 1.8V for external circuit. Vnorm = 1.8V IOmax = 20mA Power supply for external GPIO’s pull up circuits. Ground. Turn On/Off Pin Name PWRKEY PWRDWN_N RESET_N Pin No. 15 16 17 I/O Description DC Characteristics Comment Turn on the module. RPU ≈ 200kΩ VIHmax = 2.1V VIHmin = 1.3V VILmax= 0.5V Pull-up to 1.8V internally. Active low. Turn off the module.
UMTS/HSPA Module Series UG95 Hardware Design 10 IO USB differential data bus. Pin Name Pin No. I/O Description USIM_GND 47 USB_DM Compliant with USB 2.0 standard specification. Require differential impedance of 90Ω. DC Characteristics Comment USIM Interface USIM_VDD USIM_DATA USIM_CLK USIM_RST USIM_PRES ENCE 43 45 46 44 42 UG95_Hardware_Design Specified ground for USIM card. PO IO DO DO DI Power supply for USIM card. Data signal of USIM card. Clock signal of USIM card.
UMTS/HSPA Module Series UG95 Hardware Design Main UART Interface Pin Name Pin No. I/O Description DC Characteristics Comment RI 39 DO Ring indicator. VOLmax = 0.25V VOHmin = 1.55V 1.8V power domain. DCD 38 DO Data carrier detection. VOLmax = 0.25V VOHmin = 1.55V 1.8V power domain. CTS 36 DO Clear to send. VOLmax = 0.25V VOHmin = 1.55V 1.8V power domain. Request to send. VILmax = 0.35V VIHmin = 1.3V VIHmax = 1.85V 1.8V power domain. 1.8V power domain.
UMTS/HSPA Module Series UG95 Hardware Design PCM_CLK 4 IO PCM data bit clock. VOLmax = 0.25V VOHmin = 1.55V VILmin = -0.3V VILmax = 0.35V VIHmin = 1.3V VIHmax = 1.85V Pin No. I/O Description DC Characteristics Comment I2C serial clock. VOLmax = 0.25V VOHmin = 1.55V 1.8V power domain. External pull-up resistor is required. 1.8V power domain. External pull-up resistor is required. 1.8V power domain. In master mode, it’s an output signal.
UMTS/HSPA Module Series UG95 Hardware Design 3.4. Operating Modes The table below briefly summarizes the various operating modes referred in the following chapters. Table 5: Overview of Operating Modes Mode Details UMTS Idle Software is active. The module has registered to the UMTS network and the module is ready to send and receive data. UMTS Talk/Data UMTS connection is ongoing. In this mode, the power consumption is decided by network setting (e.g. TPC pattern) and data transfer rate.
UMTS/HSPA Module Series UG95 Hardware Design let the module enter into the sleep mode. Execute AT command AT+QSCLK=1 to enable the sleep mode. Drive DTR to high level. The following figure shows the connection between the module and application processor.
UMTS/HSPA Module Series UG95 Hardware Design Supply power to USB_VBUS will wake up the module. The following figure shows the connection between the module and application processor. Module Processor GPIO Power Switch USB_VBUS VDD USB_DP USB_DP USB_DM USB_DM RI EINT AP_READY GPIO GND GND Figure 4: USB Sleep Application without Suspend Function In sleep mode, the module can still receive paging message, SMS, voice call and TCP/UDP data from the network normally.
UMTS/HSPA Module Series UG95 Hardware Design 3.6. Power Supply 3.6.1. Power Supply Pins UG95 provides four VBAT pins dedicated to connect with the external power supply. There are two separate voltage domains for VBAT. VBAT_RF with two pads for module RF. VBAT_BB with two pads for module baseband. The following table shows the VBAT pins and ground pins. Table 6: VBAT and GND Pins Pin Name Pin No. Description Min. Typ. Max. Unit VBAT_RF 52,53 Power supply for module RF part. 3.4 3.8 4.
UMTS/HSPA Module Series UG95 Hardware Design VBAT VBAT_RF VBAT_BB + + D1 5.1V C1 100uF C2 C3 C4 100nF 33pF 10pF C5 100uF C6 C7 C8 100nF 33pF 10pF Module Figure 5: Star Structure of the Power Supply Please pay special attention to the power supply design for applications. Make sure the input voltage will never drop below 3.4V. If the voltage drops below 3.4V, the module will turn off automatically.
UMTS/HSPA Module Series UG95 Hardware Design MIC29302WU U1 DC_IN VBAT 470uF ADJ GND R2 100K 1% R3 47K 1% R5 4.7K MCU_POWER _ON/OFF 5 100nF 51K OUT 4 3 R1 1 C2 C1 EN 2 IN R4 470R C3 C4 470uF 100nF R6 47K Figure 6: Reference Circuit of Power Supply NOTE It is suggested to disconnect power supply to turn off the module when the module is in abnormal state. 3.6.4. Monitor the Power Supply You can use the AT+CBC command to monitor the VBAT_BB voltage value.
UMTS/HSPA Module Series UG95 Hardware Design When UG95 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a low level at least 100ms. It is recommended to use an open drain/collector driver to control the PWRKEY. You can monitor the level of the STATUS pin to judge whether the module is turned on or not. The STATUS pin output a high level, after UG95 is turned on. A simple reference circuit is illustrated in the following figure. PWRKEY ≥ 100ms 4.
UMTS/HSPA Module Series UG95 Hardware Design 1 ≥ 3.5s VBAT ≥ 100ms VIH ≥ 1.3V PWRKEY (Input) VIL ≤ 0.5V RESET_N >2.3s STATUS Module Status OFF BOOTING RUNNING Figure 9: Timing of Turning on Module NOTE ① Make sure that VBAT is stable before pulling down PWRKEY pin. It is suggested to pull down PWRKEY pin after VBAT is stable 30ms at a voltage of 3.8V. It is not suggested to pull down PWRKEY pin always. 3.7.2.
UMTS/HSPA Module Series UG95 Hardware Design Table 8: PWRDWN_N Pin Description Pin Name PWRDWN_N Pin No. 16 Description Turn off the module. DC Characteristics Comment VIHmax = 2.1V VIHmin = 1.3V VILmax = 0.5V Pull-up to 1.8V internally with 4.7kΩ resistor. Driving the PWRDWN_N to a low level voltage at least 100ms, the module will execute power-down procedure after PWRDWN_N is released. It is recommended to use an open drain/collector driver to control the PWRDWN_N.
UMTS/HSPA Module Series UG95 Hardware Design The power-down scenario is illustrated as the following figure. VBAT ≥ 100ms Log off network about 1s to 60s PWRDWN_N (Input) STATUS Module RUNNING Status Power-down procedure OFF Figure 12: Timing of Turning off Module During power-down procedure, module will log off network and save important data. After logging off, module sends out “OK”, and then sends out “POWERED DOWN” and shut down the internal power supply.
UMTS/HSPA Module Series UG95 Hardware Design If the voltage ≥ 4.21V, the following URC will be presented: +QIND: “vbatt”,1 The uncritical voltage is 3.4V to 4.3V, If the voltage > 4.3V or < 3.4V the module would automatically shut down itself. If the voltage < 3.4V, the following URC will be presented: +QIND: “vbatt”,-2 If the voltage > 4.3V, the following URC will be presented: +QIND: “vbatt”,2 NOTES 1. The value of voltage threshold can be revised by AT command, refer to document [1] for details. 2.
UMTS/HSPA Module Series UG95 Hardware Design RESET_N ≥ 100ms 4.7K Reset pulse 47K Figure 13: Reference Circuit of RESET_N by Using Driving Circuit S3 RESET_N TVS Close to S3 Figure 14: Reference Circuit of RESET_N by Using Button The reset scenario is illustrated as the following figure. VBAT ≥ 100ms > 5s VIH ≥ 1.3V RESET_N VIL ≤ 0.
UMTS/HSPA Module Series UG95 Hardware Design NOTE Use the RESET_N only when turning off the module by the command AT+QPOWD and the PWRDWN_N pin failed. 3.9. RTC Interface The RTC (Real Time Clock) can be powered by an external capacitor through the pin VRTC when the module is powered down and there is no power supply for the VBAT. If the voltage supply at VBAT is disconnected, the RTC can be powered by the capacitor. The capacitance determines the duration of buffering when no voltage is applied to UG95.
UMTS/HSPA Module Series UG95 Hardware Design When the power is off and only VRTC is running, the way of calculating the backup capacitor as follows: C= B Time *I/( VRTC-VRTCMIN) For example, when the capacitor is 1000uF: VRTC = 1.8V VRTCMIN = 1.0V I = 2uA C = 1000uF The backup time is about 400s. 3.10. UART Interface The module provides 7 lines UART interface.
UMTS/HSPA Module Series UG95 Hardware Design The logic levels are described in the following table. Table 11: Logic Levels of Digital I/O Parameter Min. Max. Unit VIL -0.3 0.35 V VIH 1.3 1.85 V VOL 0 0.25 V VOH 1.55 1.8 V UG95 provides one 1.8V UART interface. A level shifter should be used if your application is equipped with a 3.3V UART interface. A level shifter TXS0108EPWR provided by Texas Instruments is recommended.
UMTS/HSPA Module Series UG95 Hardware Design 4.7K VDD_EXT VDD_EXT 1nF MCU/ARM Module 4.7K /TXD RXD /RXD TXD 4.7K 1nF VCC_MCU VDD_EXT 4.7K /RTS /CTS GPIO EINT GPIO GND RTS CTS DTR RI DCD GND Voltage level: 5V Figure 18: Reference Circuit with Transistor Circuit The following figure is an example of connection between UG95 and PC.
UMTS/HSPA Module Series UG95 Hardware Design NOTES 1. 2. 3. 4. The module disables the hardware flow control by default. When hardware flow control is required, RTS and CTS should be connected to the host. AT command AT+IFC=2,2 is used to enable hardware flow control. AT command AT+IFC=0,0 is used to disable the hardware flow control. For more details, please refer to document [1]. Rising edge on DTR will let the module exit from the data mode by default. It can be disabled by AT commands.
UMTS/HSPA Module Series UG95 Hardware Design The following figure shows the reference design of the 8-pin USIM card. VDD_EXT USIM_VDD 15K 51K 100nF USIM_GND/GND USIM holder USIM_VDD Module VCC RST USIM_RST 22R USIM_CLK USIM_PRESENCE 22R USIM_DATA 22R CLK 33pF 33pF GND VPP IO GND 33pF ESDA6V8AV6 GND GND Figure 20: Reference Circuit of the 8-Pin USIM Card UG95 supports USIM card hot-plugging via the USIM_PRESENCE pin.
UMTS/HSPA Module Series UG95 Hardware Design In order to enhance the reliability and availability of the USIM card in customer’s application, please follow the following criterion in the USIM circuit design: Keep layout of USIM card as close as possible to the module. Assure the possibility of the length of the trace is less than 200mm. Keep USIM card signal away from RF and VBAT alignment. Assure the ground between module and USIM holder short and wide.
UMTS/HSPA Module Series UG95 Hardware Design Table 13: Pin Description of Molex USIM Card Holder Name Pin Function VDD C1 USIM card power supply. RST C2 USIM card reset. CLK C3 USIM card clock. / C4 Not defined. GND C5 Ground. VPP C6 Not connected. DATA I/O C7 USIM card data. / C8 Pull-down GND with external circuit. When the tray is present, C4 is connected to C8. For 6-pin USIM card holder, it is recommended to use Amphenol C707 10M006 512 2. Please visit http://www.amphenol.
UMTS/HSPA Module Series UG95 Hardware Design Table 14: Pin Description of Amphenol USIM Card Holder Name Pin Function VDD C1 USIM card power supply. RST C2 USIM card reset. CLK C3 USIM card clock. GND C5 Ground. VPP C6 Not connected. DATA I/O C7 USIM card data. 3.12. USB Interface UG95 contains one integrated Universal Serial Bus (USB) transceiver which complies with the USB 2.0 specification and supports high speed (480 Mbps), full speed (12 Mbps) and low speed (1.5 Mbps) mode.
UMTS/HSPA Module Series UG95 Hardware Design The following figure shows the reference circuit of USB interface. Close to USB connector USB_VBUS USB_VBUS NM_2pF 0R USB_DM USB_DP USB_DM USB_DP 0R Differential layout ESD NM NM SD12 GND GND Module ESD9L5.0ST5G USB connector Figure 24: Reference Circuit of USB Application In order to ensure the USB interface design corresponding with the USB 2.
UMTS/HSPA Module Series UG95 Hardware Design NOTE 1. UG95 module can only be used as a slave device. 2. It is suggested to set USB_DP, USB_DM and USB_VBUS pins as test points and then place these test points on the DTE for debug. 3. USB interface supports software debug and firmware upgrade by default. 3.13.
UMTS/HSPA Module Series UG95 Hardware Design details. Data bit is 32 bit and the sampling rate is 8 KHz. The following figure shows the timing of the application with ALC5616 codec. Sampling freq.
UMTS/HSPA Module Series UG95 Hardware Design 3.14. Network Status Indication The NETLIGHT signal can be used to drive a network status indication LED. The following tables describe pin definition and logic level changes in different network status. Table 17: Pin Definition of Network Indicator Pin Name Pin No. I/O Description Comment NETLIGHT 21 Indicate the module network activity status. 1.8V power domain.
UMTS/HSPA Module Series UG95 Hardware Design 3.15. Operating Status Indication The STATUS pin is set as an output pin and can be used to judge whether module is power-on. In customer’s design, this pin can be used to drive an LED in order to judge the module’s operation status. The following table describes pin definition of STATUS. Table 19: Pin Definition of STATUS Pin Name Pin No. I/O Description Comment STATUS 20 DO Indicate the module operation status. 1.8V power domain.
UMTS/HSPA Module Series UG95 Hardware Design 4 Antenna Interface The Pin 60 is the RF antenna pad. The RF interface has an impedance of 50Ω. 4.1. UMTS Antenna Interface 4.1.1. Pin Definition Table 20: Pin Definition of the RF Antenna Pin Name Pin No. I/O GND 58 ground GND 59 ground RF_ANT 60 GND 61 ground GND 62 ground IO Description Comment RF antenna pad 50Ω impedance 4.1.2.
UMTS/HSPA Module Series UG95 Hardware Design Module R1 0R RF_ANT C1 NM C2 NM Figure 30: Reference Circuit of Antenna Interface UG95 provides an RF antenna PAD for customer’s antenna connection. The RF trace in host PCB connected to the module RF antenna pad should be micro-strip line or other types of RF trace, whose characteristic impendence should be close to 50Ω. UG95 comes with grounding pads which are next to the antenna pad in order to give a better grounding. 4.2. Antenna Installation 4.2.1.
UMTS/HSPA Module Series UG95 Hardware Design Gain (dBi) 1 Max Input Power (W) 50 Input Impedance (Ω) 50 Polarization Type Vertical 4.2.2. Install the Antenna with RF Connector The following is the antenna installation with RF connector provided by HIROSE. The recommended RF connector is UF.L-R-SMT. Figure 31: Dimensions of the UF.L-R-SMT Connector (Unit: mm) You can use U.FL-LP serial connector listed in the following figure to match the UF.L-R-SMT.
UMTS/HSPA Module Series UG95 Hardware Design Figure 32: Mechanicals of UF.L-LP Connectors (Unit: mm) The following figure describes the space factor of mated connector Figure 33: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com.
UMTS/HSPA Module Series UG95 Hardware Design 5 Electrical, Reliability and Radio Characteristics 5.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table. Table 24: Absolute Maximum Ratings Parameter Min. Max. Unit VBAT_RF/VBAT_BB -0.3 4.7 V USB_VBUS -0.3 5.5 V Peak Current of VBAT_BB 0 0.8 A Peak Current of VBAT_RF 0 2 A Voltage at Digital Pins -0.3 2.3 V 5.2.
UMTS/HSPA Module Series UG95 Hardware Design 5.3. Operating Temperature The operating temperature is listed in the following table. Table 26: Operating Temperature Parameter Min. Typ. Max. Unit Normal Temperature -35 25 70 ºC Restricted Operation1) -40~ -35 70 ~ 85 ºC Storage Temperature -45 90 ºC NOTE 1) When the module works within the temperature range, the deviations from the RF specification may occur. For example, the frequency error or the phase error would increase. 5.4.
UMTS/HSPA Module Series UG95 Hardware Design Parameter Description WCDMA transfer data Conditions Min. Typ. Max. Unit Idle (USB connected) @DRX=6 31.7 mA UMTS2100 HSDPA @max power 524 mA UMTS2100 HSUPA @max power 536 mA UMTS1900 HSDPA @max power 522 mA UMTS1900 HSUPA @max power 563 mA UMTS850 HSDPA @max power 490 mA UMTS850 HSUPA @max power 520 mA UMTS900 HSDPA @max power 510 mA UMTS900 HSUPA @max power 512 mA 5.5.
UMTS/HSPA Module Series UG95 Hardware Design UMTS850 -110.5dBm 5.7. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module.
UMTS/HSPA Module Series UG95 Hardware Design 6 Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm. 6.1. Mechanical Dimensions of the Module 19.9+/-0.15 2.2+/-0.2 23.6+/-0.15 0.8+/-0.
UMTS/HSPA Module Series UG95 Hardware Design 19.90 0.775 1.70 23.60 0.85 1.10 1.00 1.70 0.70 1.15 1.70 1.00 0.
UMTS/HSPA Module Series UG95 Hardware Design 6.2. Footprint of Recommendation 19.90 1.70 1.10 0.85 0.85 0.20 23.60 1.70 1.90 1.00 0.70 1.00 1.00 2.35 1.95 0.55 Figure 36: Recommended Footprint (Top View) NOTES 1. In order to maintain the module, keep about 3mm between the module and other components in the host PCB. 2. All RESERVED pins must not be connected to GND.
UMTS/HSPA Module Series UG95 Hardware Design 6.3. Top View of the Module Figure 37: Top View of the Module 6.4.
UMTS/HSPA Module Series UG95 Hardware Design 7 Storage and Manufacturing 7.1. Storage UG95 is stored in the vacuum-sealed bag. The restriction of storage condition is shown as below. Shelf life in sealed bag is 12 months at < 40ºC/90%RH. After this bag is opened, devices that will be subjected to reflow solder or other high temperature process must be: Mounted within 72 hours at factory conditions of ≤ 30ºC/60%RH. Stored at <10% RH.
UMTS/HSPA Module Series UG95 Hardware Design It is suggested that peak reflow temperature is 235 ~ 245ºC (for SnAg3.0Cu0.5 alloy). Absolute max reflow temperature is 260ºC. To avoid damage to the module when it was repeatedly heated, it is suggested that the module should be mounted after the first panel has been reflowed. The following picture is the actual diagram which we have operated.
UMTS/HSPA Module Series UG95 Hardware Design 8 Appendix A Reference Table 30: Related Documents SN Document Name Remark [1] Quectel_UG95_AT_Commands_Manual UG95 AT Commands Manual [2] Quectel_UC20_EVB_User_Guide UC20 EVB User Guide [3] Quectel_UG95_Reference_Design UG95 Reference Design [4] Quectel_UG95&M95_Reference_Design UG95 and M95 Compatible Reference Design [5] Quectel_UG95&M95_Compatible_Design UG95 and M95 Compatibility Design Specification [6] Quectel_Module_Secondary_SMT_Use
UMTS/HSPA Module Series UG95 Hardware Design DTR Data Terminal Ready DTX Discontinuous Transmission EFR Enhanced Full Rate EGSM Extended GSM900 band (includes standard GSM900 band) ESD Electrostatic Discharge FR Full Rate GMSK Gaussian Minimum Shift Keying GPS Global Positioning System GSM Global System for Mobile Communications HR Half Rate HSPA High Speed Packet Access I/O Input/Output IMEI International Mobile Equipment Identity Imax Maximum Load Current Inorm Normal Current
UMTS/HSPA Module Series UG95 Hardware Design PSK Phase Shift Keying QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying RF Radio Frequency RHCP Right Hand Circularly Polarized RMS Root Mean Square (value) RTC Real Time Clock Rx Receive SIM Subscriber Identification Module SMS Short Message Service TDMA Time Division Multiple Access TE Terminal Equipment TX Transmitting Direction UART Universal Asynchronous Receiver & Transmitter UMTS Universal Mobile Telecomm
UMTS/HSPA Module Series UG95 Hardware Design VImax Absolute Maximum Input Voltage Value VImin Absolute Minimum Input Voltage Value VOHmax Maximum Output High Level Voltage Value VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage Value VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access UG95_Hardware_Design Confidential / Released 64 / 67
UMTS/HSPA Module Series UG95 Hardware Design 9 Appendix B GPRS Coding Scheme Table 32: Description of Different Coding Schemes Scheme CS-1 CS-2 CS-3 C4-4 Code Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.
UMTS/HSPA Module Series UG95 Hardware Design 10 Appendix C GPRS Multi-slot Class Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependant, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
UMTS/HSPA Module Series UG95 Hardware Design 11 Appendix D EDGE Modulation and Coding Scheme Table 34: EDGE Modulation and Coding Scheme Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1: GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2: GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3: GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4: GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.60kbps 35.20kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.
