User's Manual
Table Of Contents
- Contents
- Table Index
- Figure Index
- 0. Revision history
- 1. Introduction
- 2. Product concept
- 3. Application interface
- 3.1. Pin of module
- 3.2. Operating modes
- 3.3. Power supply
- 3.4. Power on and down scenarios
- 3.5. Charge interface
- 3.6. Power saving
- 3.7. Summary of state transition
- 3.8. RTC backup
- 3.9. Serial interfaces
- 3.10. Audio interfaces
- 3.11. SIM card interface
- 3.12. SD card interface
- 3.13. PCM interface
- 3.14. ADC
- 3.15. Behaviors of the RI
- 3.16. Network status indication
- 3.17. Operating status indication
- 4. Antenna interface
- 5. Electrical, reliability and radio characteristics
- 6. Mechanical dimensions
- 7. Storage and manufacturing
- Appendix A: GPRS coding schemes
- Appendix B: GPRS multi-slot classes
M50 Hardware Design
M50_HD_V2.0 - 48 -
The reference design for 5V level match is shown as below. The connection of dotted line can be
referred to the connection of solid line. Please pay attention to the direction of signal. Input dotted
line of module should be referred to input solid line of the module. Output dotted line of module
should be referred to output solid line of the module.
As to the circuit below, VDD_EXT supplies power for the I/O of module, while VCC_MCU
supplies power for the I/O of the MCU/ARM.
MCU/ARM
/TXD
/RXD
VDD_EXT
4.7K
VCC_MCU
4.7K
5.6K
4.7K
VDD_EXT
TXD
RXD
RTS
CTS
DTR
RI
/RTS
/CTS
GND
GPIO DCD
Module
GPIO
EINT
VCC_MCU
Voltage level: 5V
4.7K
GND
Figure 25
: Level match design for 5V system
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