M95 Hardware Design M95 Quectel Cellular Engine Hardware Design M95_HD_V1.0 M95_HD_V1.
M95 Hardware Design Document Title M95 Hardware Design Revision 1.0 Date 2012-02-06 Status Released Document Control ID M95_HD_V1.0 General Notes Quectel offers this information as a service to its customers, to support application and engineering efforts that use the products designed by Quectel. The information provided is based upon requirements specifically provided for customers of Quectel.
M95 Hardware Design Contents Contents ............................................................................................................................................ 3 Table Index ....................................................................................................................................... 5 Figure Index ...................................................................................................................................... 6 0. Revision history ..........
M95 Hardware Design 3.9.1. Decrease TDD noise and other noise .................................................................... 49 3.9.2. Microphone interfaces design ............................................................................... 50 3.9.3. Receiver interface design ...................................................................................... 50 3.9.4. Earphone interface design ..................................................................................... 51 3.9.5.
M95 Hardware Design Table Index TABLE 1: RELATED DOCUMENTS .................................................................................................... 9 TABLE 2: TERMS AND ABBREVIATIONS ...................................................................................... 10 TABLE 3: MODULE KEY FEATURES ...............................................................................................
M95 Hardware Design Figure Index FIGURE 1: MODULE FUNCTIONAL DIAGRAM ............................................................................. 18 FIGURE 2: PIN ASSIGNMENT ........................................................................................................... 20 FIGURE 3: RIPPLE IN SUPPLY VOLTAGE DURING TRANSMITTING BURST.......................... 27 FIGURE 4: REFERENCE CIRCUIT OF THE VBAT INPUT..............................................................
M95 Hardware Design FIGURE 42: FOOTPRINT ONE OF RECOMMENDATION(UNIT: MM) .................................... 67 FIGURE 43: TOP VIEW OF THE MODULE ....................................................................................... 68 FIGURE 44: BOTTOM VIEW OF THE MODULE.............................................................................. 69 FIGURE 45: PASTE APPLICATION ...................................................................................................
M95 Hardware Design 0. Revision history Revision Date Author Description of change 1.0 2011-12-29 Luka WU Initial M95_HD_V1.
M95 Hardware Design 1. Introduction This document defines Module M95 and describes its hardware interface which are connected with the customer application and the air interface. This document can help customers quickly understand the interface specifications, electrical and mechanical details of M95. Associated with application notes and user guide, customers can use M95 to design and set up mobile applications easily. 1.1.
M95 Hardware Design 1.2.
M95 Hardware Design Li-Ion Lithium-Ion Abbreviation Description MO Mobile Originated MS Mobile Station (GSM engine) MT Mobile Terminated PAP Password Authentication Protocol PBCCH Packet Switched Broadcast Control Channel PCB Printed Circuit Board PDU Protocol Data Unit PPP Point-to-Point Protocol RF Radio Frequency RMS Root Mean Square (value) RTC Real Time Clock RX Receive Direction SIM Subscriber Identification Module SMS Short Message Service TDMA Time Division Multiple
M95 Hardware Design SM SIM phonebook 1.3. Directives and standards The M95 module is designed to comply with the FCC statements. FCC ID is XMR201202M95. The Host system using M95, should have label indicated FCC ID: XMR201202M95. 1.3.1. FCC Statement 1. This device complies with Part 15 of the FCC rules. Operation is subject to the following conditions: a) This device may not cause harmful interference.
M95 Hardware Design The Host system using M95, should have label indicating “transmitter module IC:10064-201202M95. French version Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence.
M95 Hardware Design Road safety comes first! Do not use a hand-held cellular terminal or mobile while driving a vehicle, unless it is securely mounted in a holder for hands-free operation. Before making a call with a hand-held terminal or mobile, park the vehicle. GSM cellular terminals or mobiles operate over radio frequency signal and cellular network and cannot be guaranteed to connect in all conditions, for example no mobile fee or an invalid SIM card.
M95 Hardware Design 2. Product concept M95 is a Quad-band GSM/GPRS engine that works at frequencies of GSM850MHz, GSM900MHz, DCS1800MHz and PCS1900MHz. The M95 features GPRS multi-slot class 12 and supports the GPRS coding schemes CS-1, CS-2, CS-3 and CS-4. For more details about GPRS multi-slot classes and coding schemes, please refer to Appendix A and Appendix B. With a tiny profile of 19.9mm × 23.6mm × 2.
M95 Hardware Design Temperature range Normal operation: -35°C ~ +80°C Restricted operation: -40°C ~ -35°C and +80°C ~ +85°C 1) Storage temperature: -45°C ~ +90°C DATA GPRS: GPRS data downlink transfer: max. 85.6 kbps GPRS data uplink transfer: max. 85.
M95 Hardware Design Table 4: Coding schemes and maximum net data rates over air interface Coding scheme 1 Timeslot 2 Timeslot 4 Timeslot CS-1: 9.05kbps 18.1kbps 36.2kbps CS-2: 13.4kbps 26.8kbps 53.6kbps CS-3: 15.6kbps 31.2kbps 62.4kbps CS-4: 21.4kbps 42.8kbps 85.6kbps 2.2.
M95 Hardware Design 26M SIM MT6252D VDD_EXT PWRKEY Contro l PA EMERG_OFF TQM6M4068 VRTC AUDIO 32.768K Application Interface (42-SMD Pads) UART Power supply RF_ANTENNA Figure 1: Module functional diagram 2.3. Evaluation board In order to help customer to develop applications with M95, Quectel supplies an evaluation board (EVB), RS-232 to USB cable, power adapter, earphone, antenna and other peripherals to control or test the module. For details, please refer to the document [12]. M95_HD_V1.
M95 Hardware Design 3. Application interface The module is equipped with 42 pin SMT pad and it adopts LCC package. Detailed descriptions on Sub-interfaces included in these pads are given in the following chapters: Power supply Turn on/off Power saving RTC UART interfaces Audio interfaces SIM interface M95_HD_V1.
M95 Hardware Design 3.1. Pin 3.1.1. Pin assignment Figure 2: Pin assignment Table 5: M95 pin assignment PIN NO. PIN NAME 1 AGND 3 MIC2N 5 PIN NO. PIN NAME I/O 2 MIC2P I I 4 MIC1P I MIC1N I 6 SPK1N O 7 SPK1P O 8 LOUDSPKN O 9 LOUDSPKP O 10 PWRKEY I 11 EMERG_OFF I 12 STATUS O M95_HD_V1.
M95 Hardware Design 13 NETLIGHT O 14 DBG_RXD 15 DBG_TXD O 16 RESERVED 17 RESERVED 18 RESERVED 19 VDD_EXT O 20 DTR I 21 RXD I 22 TXD O 23 CTS O 24 RTS I 25 DCD O 26 RI O 27 SIM_VDD O 28 SIM_RST O 29 SIM_DATA I/O 30 SIM_CLK O 31 SIM_GND 32 VRTC I/O 33 VBAT 34 VBAT I 35 GND 36 GND 37 GND 38 GND 39 RF_ANT 40 GND 41 RESERVED 42 RESERVED I I/O I 3.1.2. Pin description Table 6: Pin description Power supply PIN NAME PIN NO.
M95 Hardware Design bypass capacitor, when using this pin for power supply. GND 35, 36, 37, 38, 40 Ground Turn on/off PIN NAME PIN NO. I/ O DESCRIPTION DC CHARACTERISTICS COMMENT PWRKEY 10 I Power on/off key. PWRKEY should be pulled down for a moment to turn on or turn off the system. VILmax= 0.1*VBAT VIHmin= 0.6*VBAT VImax=VBAT Pulled up to VBAT internally. Emergency shutdown PIN NAME PIN NO. I/ O DESCRIPTION DC CHARACTERISTICS COMMENT EMERG_ OFF 11 I Emergency off.
M95 Hardware Design voice-band input MIC2P MIC2N 2, 3 I Channel two of positive and negative voice-band input SPK1N SPK1P 6, 7 O Channel one of positive and negative voice-band output If unused, keep these pins open. AGND 1 Cooperate with LOUDSPKP If unused, keep this pin open. LOUDSPKN 8,9 O Channel two of positive and negative voice-band output 1. If unused, keep these pins open. 2. Embedded amplifier of class AB internally. 3. Support both Voice and ring.
M95 Hardware Design DBG_RXD 14 I DBG_TXD 15 O UART interface for debugging only. VILmin=-0.3V VILmax= 0.25*VDD_EXT VIHmin= 0.75*VDD_EXT VIHmax= VDD_EXT+0.3V VOHmin= 0.85*VDD_EXT VOLmax= 0.15*VDD_EXT If unused, keep these pins open. SIM interface PIN NAME PIN NO. I/ O DESCRIPTION DC CHARACTERISTICS COMMENT SIM_ VDD 27 O Power supply for SIM card The voltage can be selected by software automatically. Either 1.8V or 3V. SIM_RST 28 O SIM reset 3V: VOLmax=0.36V VOHmin= 0.9*SIM_VDD 1.
M95 Hardware Design VOHmin= 0.9*SIM_VDD SIM_GND 31 SIM ground RF interface PIN NAME PIN NO. I/ O DESCRIPTION DC CHARACTERISTICS RF_ANT 39 I/ O RF antenna pad Impedance of 50Ω M95_HD_V1.
M95 Hardware Design 3.2. Operating modes The table below briefly summarizes the various operating modes in the following chapters. Table 7: Overview of operating modes Mode Function Normal operation GSM/GPRS SLEEP The module will automatically go into SLEEP mode if DTR is set to high level and there is no interrupt (such as GPIO interrupt or data on UART port). In this case, the current consumption of module will reduce to the minimal level.
M95 Hardware Design 1) Use the EMERG_OFF pin only while failing to turn off the module by the command “AT+QPOWD=1” and the PWRKEY pin. Please refer to Section 3.4.2.2. 3.3. Power supply 3.3.1. Feature of GSM power The unit of GSM transmit in the wireless path is pulse string which is constructed by GSMK bit string and we call it burst. The period of burst is 4.16ms and the last time of burst is 577us. The burst current will reach 1.6A while idle current is as low as tens of milliampere.
M95 Hardware Design (0.1µF to 1µF) ceramic capacitor should be in parallel with the 100µF capacitor, which is illustrated in Figure 4. The capacitors should be placed close to the M95 VBAT pins. The PCB traces from the VBAT pads to the power source must be wide enough to ensure that there is not too much voltage drop occurring in the transmitting burst mode. The width of trace should be no less than 2mm and the principle of the VBAT trace is the longer, the wider.
M95 Hardware Design 3.3.4. Monitor power supply To monitor the supply voltage, the “AT+CBC” command can be used which includes three parameters: charging status, remaining battery capacity and voltage value (in mV). It returns the 0-100 percent of battery capacity and actual value measured between VBAT and GND. The voltage is automatically measured in period of 5s. The displayed voltage (in mV) is averaged over the last measuring period before the “AT+CBC” command is executed.
M95 Hardware Design PWRKEY 4.7K Turn on pulse 47K Figure 6: Turn on the module using driving circuit The other way to control the PWRKEY is using a button directly. A TVS component is indispensable to be placed nearby the button for ESD protection. When pressing the key, electrostatic strike may generate from finger. A reference circuit is showed in Figure 7. S1 PWRKEY TVS1 Close to S1 Figure 7: Turn on the module using keystroke The power-on scenarios is illustrated as the following figure.
M95 Hardware Design 1 VBAT 54ms >1s 250ms PWRKEY (INPUT) VIH > 0.1*VBAT VIL<0.1*VBAT VDD_EXT (OUTPUT) EMERG_OFF (INPUT) 800ms STATUS (OUTPUT) Figure 8: Timing of turning on system ① Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is recommended 30ms. Note: Customer can monitor the voltage level of the STATUS pin to judge whether the module is power-on. After the STATUS pin goes to high level, PWRKEY can be released.
M95 Hardware Design The power-down procedure causes the module to log off from the network and allows the software to save important data before completely disconnecting the power supply, thus it is a safe way. Before the completion of the power-down procedure, the module sends out the result code shown as below: NORMAL POWER DOWN Note: This result code does not appear when autobauding is active and DTE and DCE are not correctly synchronized after start-up.
M95 Hardware Design 3.4.2.2. Power down the module using AT command Customer’s application can turn off the module via AT command “AT+QPOWD=1”. This command will let the module to log off from the network and allow the software to save important data before completely disconnecting the power supply, thus it is a safe way. Before the completion of the power-down procedure the module sends out the result code shown as below: NORMAL POWER DOWN After that moment, no further AT commands can be executed.
M95 Hardware Design 3.4.2.4. Emergency shutdown using EMERG_OFF pin The module can be shut down by driving the pin EMERG_OFF to a low level voltage over 20ms and then releasing it. The EMERG_OFF line can be driven by an Open Drain / Collector driver or a button. The circuit is illustrated as the following figures. EMERG_OFF 4.
M95 Hardware Design 3.4.3. Restart 3.4.3.1. Restart the module using the PWRKEY pin Customer’s application can restart the module by driving the PWRKEY to a low level voltage for certain time, which is similar to the way of turning on module. Before restarting the module, at least 500ms should be delayed after detecting the low level of STATUS. The restart timing is illustrated as the following figure. Delay > 0.
M95 Hardware Design 3.5. Power saving Upon system requirement, there are several actions to drive the module to enter low current consumption status. For example, “AT+CFUN” can be used to set module into minimum functionality mode and DTR hardware interface signal can be used to lead system to SLEEP mode. 3.5.1.
M95 Hardware Design 3.5.3. Wake up the module from SLEEP mode When the module is in the SLEEP mode, the following methods can wake up the module. If the DTR Pin is set low, it would wake up the module from the SLEEP mode. The UART port will be active within 20ms after DTR is changed to low level. Receiving a voice or data call from network wakes up module. Receiving an SMS from network wakes up module. Note: DTR pin should be held low level during communication between the module and DTE. 3.6.
M95 Hardware Design MODULE VRTC 1.5K RTC Core Non-chargeable Backup Battery Figure 14: RTC supply from non-chargeable battery MODULE VRTC 1.5K RTC Core Rechargeable Backup Battery Figure 15: RTC supply from rechargeable battery MODULE VRTC 1.5K Large-capacitance Capacitor RTC Core Figure 16: RTC supply from capacitor Coin-type rechargeable capacitor such as XH414H-IV01E from Seiko can be used. M95_HD_V1.
M95 Hardware Design Figure 17: Seiko XH414H-IV01E Charge Characteristics 3.8. Serial interfaces The module provides two serial ports: UART and Debug Port. The module is designed as a DCE (Data Communication Equipment), following the traditional DCE-DTE (Data Terminal Equipment) connection. Autobauding function supports baud rate from 4800bps to 115200bps.
M95 Hardware Design The logic levels are described in the following table. Table 9: Logic levels of the UART interface Parameter Min Max Unit VIL 0 0.25*VDD_EXT V VIH 0.75*VDD_EXT VDD_EXT +0.3 V VOL 0 0.15*VDD_EXT V VOH 0.
M95 Hardware Design Autobauding allows the module to detect the baud rate by receiving the string “AT” or “at” from the host or PC automatically, which gives module flexibility without considering which baud rate is used by the host controller. Autobauding is enabled in default.
M95 Hardware Design Module (DCE) UART Port PC (DTE) UART port TXD RXD RTS CTS DTR DCD TXD RXD RTS CTS DTR DCD RI RI GND GND Figure 18: Connection of all functional UART port Three lines connection is shown as below. Module(DCE) UART Port Host(DTE) Controller TXD TXD RXD RXD GND GND 0R RTS Figure 19: Connection of three lines UART port UART Port with hardware flow control is shown as below. This connection will enhance the reliability of the mass data communication. M95_HD_V1.
M95 Hardware Design Module(DCE) UART Port Host(DTE) Controller TXD TXD RXD RXD RTS RTS CTS CTS GND GND Figure 20: Connection of UART port associated hardware flow control 3.8.1.3. Software upgrade The TXD, RXD can be used to upgrade software. The PWRKEY pin must be pulled down before the software upgrades. Please refer to the following figures for software upgrade.
M95 Hardware Design 3.8.2. Debug Port Debug Port Two lines: DBG_TXD and DBG_RXD It outputs log information automatically. Debug Port is only used for software debugging and its baud rate must be configured as 460800bps. Module(DCE) Debug port Debug Computer DBG_TXD TXD DBG_RXD RXD GND GND Figure 22: Connection of software debug 3.8.3. UART Application The reference design of 3.3V level match is shown as below. 1K and 5.
M95 Hardware Design MODULE MCU/ARM /TXD /RXD 1K RXD TXD 1K /RTS /CTS GPIO 1K EINT 1K RI GPIO 1K DCD RTS CTS DTR 1K 1K 5K6 5K6 5K6 voltage level: 3.3V Figure 23: 3.3V level match circuit Note: 5.6K resistors among the above diagram need to be changed to 15K resistors for 3V system. M95_HD_V1.
M95 Hardware Design The reference design of 5V level match is shown as below. The construction of dotted line can refer to the construction of solid line. Please pay attention to direction of connection. Input dotted line of module should refer to input solid line of the module. Output dotted line of module should refer to output solid line of the module. MCU/ARM MODULE VDD_EXT 4.7k VBAT GND 4.7k VCC_MCU 1K /TXD RXD TXD /RXD 4.7k 4.
M95 Hardware Design The following picture is an example of connection between module and PC. A RS_232 level shifter IC or circuit must be inserted between module and PC, since these three UART ports don’t support the RS_232 level, while support the CMOS level only.
M95 Hardware Design 3.9. Audio interfaces The module provides two analogy input channels and three analogy output channels.
M95 Hardware Design Table 12: AOUT2 output characteristics Item Condition RMS power 8ohm load VBAT=4.3V THD+N=1% 800 mW 8ohm load VBAT=3.7V THD+N=1% 700 mW 8ohm load VBAT=3.3V THD+N=1% 500 mW Gain adjustment range Gain adjustment steps min type 0 max 18 3 unit dB dB 3.9.1. Decrease TDD noise and other noise The 33pF capacitor is applied for filtering out 900MHz RF interference when the module is transmitting at GSM900MHz. Without placing this capacitor, TDD noise could be heard.
M95 Hardware Design 3.9.2. Microphone interfaces design AIN1/IN2 channels come with internal bias supply for external electret microphone. A reference circuit is shown in Figure 26. Close to MIC Close to Module GND GND 10pF 33pF 10pF 33pF GND Differential layout GND GND ESD ANTI 10pF 33pF 10pF 33pF MICxP Module MICxN 33pF 10pF Electret Microphone 33pF 10pF ESD ANTI GND GND GND GND GND Figure 26: Microphone interface design of AIN1&AIN2 3.9.3.
M95 Hardware Design 3.9.4. Earphone interface design Close to Module GND Close to Socket GND 10pF 33pF 10pF 33pF 10pF 33pF Differential layout GND 4.7uF GND GND MIC2N 33pF 33pF M I 2P C Module GND 68R GND LOUDSPKP AGND 3 0R 22uF 33pF 4 2 1 10pF AGND AGND GND GND Amphenol 9001-8905-050 GND Figure 28: Earphone interface design 3.9.5.
M95 Hardware Design 3.9.6. Audio characteristics Table 13: Typical electret microphone characteristics Parameter Min Typ Max Unit Working Voltage 1.2 1.5 2.0 V Working Current 200 500 uA External Microphone Load Resistance 2.
M95 Hardware Design The SIM interface is powered from an internal regulator in the module. Both 1.8V and 3.0V SIM Cards are supported. Table 15: Pin definition of the SIM interface Name Pin Function SIM_VDD 27 Supply power for SIM Card. Automatic detection of SIM card voltage. 3.0V±10% and 1.8V±10%. Maximum supply current is around 10mA.
M95 Hardware Design To avoid possible cross-talk from the SIM_CLK signal to the SIM_DATA signal be careful that both traces are not placed closely next to each other. The traces of SIM_CLK, SIM_DATA and SIM_RST are recommended to be around with GND independently. All signals of SIM interface should be protected against ESD with a TVS diode array. It is recommended to add TVS diode such as WILL (http://www.willsemi.com) ESDA6V8AV6. The parasitic capacitance of TVS diode is less than 50pF.
M95 Hardware Design VPP C6 Not Connect SIM_DATA C7 SIM Card data I/O 3.12. Behaviors of the RI Table 17: Behaviors of the RI State RI respond Standby HIGH Voice calling Change to LOW, then: (1) Change to HIGH when call is established. (2) Use ATH to hang up the call, change to HIGH. (3) Calling part hangs up, change to HIGH first, and change to LOW for 120ms indicating “NO CARRIER” as an URC, then change to HIGH again. (4) Change to HIGH when SMS is received.
M95 Hardware Design HIGH RI Data calling establish. On-hook by “ATH”. SMS received LOW Idle Ring Figure 33: RI behavior of data calling as a receiver HIGH RI LOW Idle Calling Talking On-hook Idle Figure 34: RI behavior as a caller HIGH RI LOW Idle or talking 120ms URC or SMS Received Figure 35: RI behavior of URC or SMS received M95_HD_V1.
M95 Hardware Design 3.13. Network status indication The NETLIGHT signal can be used to drive a network status indication LED. The working state of this pin is listed in Table 18. Table 18: Working state of the NETLIGHT State Module function Off The module is not running. 64ms On/ 800ms Off The module is not synchronized with network. 64ms On/ 2000ms Off The module is synchronized with network. 64ms On/ 600ms Off GPRS data transfer is ongoing. A reference circuit is shown in Figure 36.
M95 Hardware Design VBAT 300R Module 4.7K STATUS 47K Figure 37: Reference circuit of the STATUS M95_HD_V1.
M95 Hardware Design 4. Antenna interface The Pin 39 is the RF antenna pad. The RF interface has an impedance of 50Ω. Table 20: Pin definition of the Antenna interface Name Pin Function GND 37 ground GND 38 ground RF_ANT 39 RF antenna pad GND 40 ground 4.1. RF reference design The RF external circuit is recommended as below: 0R RF_ANT MODULE NM NM Figure 38: Reference circuit of RF M95 provides an RF antenna PAD for customer’s antenna connection.
M95 Hardware Design 4.2. RF output power Table 21: The module conducted RF output power Frequency Max Min GSM850 33dBm ±2dB 5dBm±5dB EGSM900 33dBm ±2dB 5dBm±5dB DCS1800 30dBm ±2dB 0dBm±5dB PCS1900 30dBm ±2dB 0dBm±5dB Note: In GPRS 4 slots TX mode, the max output power is reduced by 2.5dB. This design conforms to the GSM specification as described in section 13.16 of 3GPP TS 51.010-1. 4.3.
M95 Hardware Design Figure 39: RF soldering sample M95_HD_V1.
M95 Hardware Design 5. Electrical, reliability and radio characteristics 5.1. Absolute maximum ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in the following table: Table 24: Absolute maximum ratings Parameter Min Max Unit VBAT -0.3 +4.73 V Peak current of power supply 0 2 A RMS current of power supply (during one TDMA- frame) 0 0.7 A Voltage at digital pins -0.3 3.3 V Voltage at analog pins -0.3 3.
M95 Hardware Design IVBAT Voltage drop during transmitting burst Maximum power control level on GSM850 and GSM900. Voltage ripple Maximum power control level on GSM850 and GSM900 @ f<200kHz @ f>200kHz Average supply current Peak supply current (during transmission slot) 1) 2) 400 mV 50 2 mV mV POWER DOWN mode SLEEP mode @ DRX=5 30 0.
M95 Hardware Design @power level #15,Typical 69mA PCS1900 @power level #0 <250mA,Typical 153mA @power level #7,Typical 82mA @power level #15,Typical 70mA 5.5. Electro-static discharge Although the GSM engine is generally protected against Electrostatic Discharge (ESD), ESD protection precautions should still be emphasized. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any applications using the module.
M95 Hardware Design 6. Mechanical dimensions This chapter describes the mechanical dimensions of the module. 6.1. Mechanical dimensions of module Figure 40: M95 top and side dimensions(Unit: mm) M95_HD_V1.
M95 Hardware Design 1 Figure 41: M95 bottom dimensions(Unit: mm) M95_HD_V1.
M95 Hardware Design 6.2. Footprint of recommendation A frame line frame line Silksreen B A Silksreen B Figure 42: Footprint one of recommendation(Unit: mm) Note: 1. The blue pads are used for reserved pins customs can design the PCB decal without them. 2. To maintain the module, keep about 3mm away between the module and other components in host PCB. M95_HD_V1.
M95 Hardware Design 6.3. Top view of the module Figure 43: Top view of the module M95_HD_V1.
M95 Hardware Design 6.4. Bottom view of the module Figure 44: Bottom view of the module M95_HD_V1.
M95 Hardware Design 7. Storage and Manufacturing 7.1. Storage M95 is distributed in vacuum-sealed bag. The restriction of storage condition is shown as below.
M95 Hardware Design 7.2. Soldering The squeegee should push the paste on the surface of the stencil that makes the paste fill the stencil openings and penetrate to the PCB. The force on the squeegee should be adjusted so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil at the hole of the module pads should be 0.2mm for M95. Figure 45: Paste application Suggest peak reflow temperature is from 235 ºC to 245 ºC (for SnAg3.0Cu0.5 alloy).
M95 Hardware Design ℃ Preheat Heating Cooling 250 Liquids Temperature 217 200℃ 200 40s~60s 160℃ 150 70s~120s 100 Between 1~3℃/S 50 0 50 100 150 200 250 300 s Time(s) Figure 46: Ramp-Soak-Spike reflow profile 7.3. Packaging M95 modules are distributed in trays of 25 pieces each. This is especially suitable for the M95 according to SMT processes requirements. The trays are stored inside a vacuum-sealed bag which is ESD protected.
M95 Hardware Design Appendix A: GPRS coding schemes Four coding schemes are used in GPRS protocol. The differences between them are shown in Table 29. Table 29: Description of different coding schemes Scheme Code rate USF Pre-coded USF Radio Block excl.USF and BCS BCS Tail Coded bits Punctured bits Data rate Kb/s CS-1 1/2 3 3 181 40 4 456 0 9.05 CS-2 2/3 3 6 268 16 4 588 132 13.4 CS-3 3/4 3 6 312 16 4 676 220 15.6 CS-4 1 3 12 428 16 - 456 - 21.
M95 Hardware Design Appendix B: GPRS multi-slot classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependant, and determine the maximum achievable data rates in both the uplink and downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots, while the second number indicates the amount of uplink timeslots.
Shanghai Quectel Wireless Solutions Co., Ltd. Room 501, Building 13, No.99 Tianzhou Road, Shanghai, China 200233 Tel: +86 21 5108 6236 Mail: info@quectel.