User's Manual

modules.
 Timing Generator - generates the control signals related to the TDMA frame timing.
 Power, Reset and Clock subsystem - manages the power, reset, and clock distribution inside MT6223D
 LDOs, Power-on sequences, swicthes and SIM level shifters.
2) SST34HF
Features
：
32-Mbit Flash and 8-Mbit PSRAM 2.7V~3.0V Operating voltage
Flash：32-megabit（2M*16）2.7V to 3.0V Read/Write Access Time-70ns Sector Erase Architecture
-Sixty-three 32K WordSectors With Individual Write Lockout
-Eight 4K Word Sectors with Individual Write Lockout Fast Word Program Time-15us Suspend/Resume
Feature for Erase and Program
-Supports Reading and Programming from Any Sectors by Suspending Erase of a
Different Sector -Supports Reading Any Word by Suspending Programming of Any Other Word
Low-power Operation -12mAActive -13uA Standby
PSRAM：4-megabit（256K*16）/8-megabit(512K*16) 2.7V to 3.3V Vcc 70ns Access Time
3.2.7 Mechanical architecture
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