Specifications
vi
12.4.2 Output Current Rating .................................................................................................................................................. 106
12.4.3 Over- and Under-Voltage Protection ............................................................................................................................ 106
12.4.4 Short Circuit Protection ................................................................................................................................................ 107
12.4.5 Over Temperature Protection ....................................................................................................................................... 107
12.4.6 Reset After Shutdown .................................................................................................................................................. 107
12.4.7 Current Sharing ............................................................................................................................................................ 107
12.4.8 I2C Devices .................................................................................................................................................................. 107
12.4.9 Module Cold Redundancy Operation ........................................................................................................................... 107
12.4.10 Power Supply Module LED indicators ........................................................................................................................ 108
12.5 Regulatory Agency Requirements ...................................................................................................................... 108
13. Power Distribution Board (PDB) ......................................................................................... 109
13.1 Introduction ......................................................................................................................................................... 109
13.2 Functional Block Diagram and Feature Description ........................................................................................... 110
13.2.1 Connector Signal Description and Pin-outs .................................................................................................................. 111
13.2.2 Voltage Regulation ....................................................................................................................................................... 114
13.2.3 DC Output Load Requirements .................................................................................................................................... 114
13.2.4 Dynamic Loading .......................................................................................................................................................... 115
13.2.5 Protection Circuits ........................................................................................................................................................ 115
13.2.6 Remote On/Off (PSON*) .............................................................................................................................................. 115
13.2.7 PSKILL ......................................................................................................................................................................... 115
13.2.8 POWER GOOD SIGNAL (PWOK) ............................................................................................................................... 115
13.2.9 SMBAlert# .................................................................................................................................................................... 115
13.2.10 PMBus Requirements ................................................................................................................................................ 116
13.3 Cold Redundant Operation ................................................................................................................................. 116
13.3.1 PDB Cold Redundancy Control Circuitry ...................................................................................................................... 116
13.3.2 Cold Redundancy Functional Description .................................................................................................................... 117
13.3.3 Cold Redundancy Disabling Feature ............................................................................................................................ 118
14. Front Panel Fan Board (FPFB) and Operator Panel .......................................................... 119
14.1 Architectural Overview ....................................................................................................................................... 119
14.2 Front Panel Fan Board (FPFB) Functional Architecture .................................................................................... 120
14.2.1 Front Panel Fan Board (FPFB) Connector Signal Description and Pinouts ................................................................. 120
14.2.2 LED Description ........................................................................................................................................................... 123
14.3 Front Panel Control ............................................................................................................................................ 123
14.3.1 System ID Buttons and LEDs ....................................................................................................................................... 123
14.3.2 Functional Block Diagram ............................................................................................................................................ 125
14.3.3 Connector Definition and Pinout ................................................................................................................................... 125
15. Basic Input/Output System (BIOS) ..................................................................................... 126
15.1 BIOS Architecture ............................................................................................................................................... 126
15.1.1 Data Structure Descriptions ......................................................................................................................................... 126
15.2 BIOS Identification String ................................................................................................................................... 126
16. BIOS Initialization ............................................................................................................... 127
16.1 Processors .......................................................................................................................................................... 127
16.1.1 CPUID .......................................................................................................................................................................... 127
16.1.2 Multiple Processor Initialization .................................................................................................................................... 127
16.1.3 CPU Population ............................................................................................................................................................ 127
16.1.4 Mixed Processor Steppings .......................................................................................................................................... 128
16.1.5 Mixed Processor Families ............................................................................................................................................ 128
16.1.6 Mixed Processor Intel® QuickPath Interconnect Speeds ............................................................................................. 128
16.1.7 Mixed Processor Cache Sizes ..................................................................................................................................... 128
16.1.8 Processor Cache .......................................................................................................................................................... 128
16.1.9 Microcode Update ........................................................................................................................................................ 128
16.1.10 Mixed Processor Configuration .................................................................................................................................. 128
16.1.11 Intel® Hyper-Threading Technology........................................................................................................................... 130