Specifications

Memory Riser QSSC-S4R Technical Product Specification
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4. Memory Riser
The QSSC-S4R Server System supports up to eight memory riser modules that plug into the main board vertically via
230-pin PCIe type card edge connectors. Each memory riser has the following features:
x Support for up to eight DDR3 registered DIMMs
x Two Intel® 7500 Scalable Memory Buffers, each supporting two DDR3 buses; each DDR3 bus supporting two
DDR3 DIMMs
x The Intel® 7500 Scalable Memory Buffer supports the following features:
- Intel® SMI (Intel Scalable Memory Interconnect) protocol and signaling
- 4.8 Gbs, 6.4 Gbs signaling forwarded clock fail-over NB and SB
- Support for integrating RDIMM thermal sensor information into Intel SMI status Frame
- No support for FB-DIMM1 protocol and signaling
x Hot swappable at the memory riser level but not supported on individual DIMM level for hot swap
x Supports DDR3-1066 RDIMMs at speeds of 800, 978 and 1066MHz.
x Supports DDR3-1333 RDIMMs running at 1066, 978 and 800MHz.
x All channels in a system will run at the fastest common frequency
x Supports DDR3 registered DIMM configurations of up to x8 dual-rank (DR) and x4 quad-rank (QR) DDR3 SDRAM
x Supports DDR3 DRAM technologies of 1Gbit and 2Gbit
x Supports 1GB, 2GB, 4GB, 8GB & 16GB (16GB with QRx4 DIMMs only) DIMM capacity. 16 GB QR DIMMs can
only occupy half of the available slots in a memory riser; otherwise the system may exceed thermal specifications.
x Mixed memory DIMM is not supported. Mixed DIMM includes a mix of RDIMM and UDIMM, mixed DIMM sizes and
mixed DIMM technologies.
x Cmd/Addr parity generation and error logging.
x Supports CLTT (Closed Loop Thermal Throttling) via temperature sensors on registered DIMMs.
x Supports DDR3 JEDEC standard temperature sensors on all DIMMs.
x LED fault indicators for each DIMM.
x On board voltage regulators for 0.75V, 1.1V, 1.5V and 1.8V.
x One Field Replaceable Unit (FRU).
x Supports memory RAS features including Lock Step mode, Interleaving, Mirroring Mode, Sparing Mode and
Hemisphere Mode.
4.1 System Memory Topology and Functional Diagram
The following nomenclature is followed for DIMM population.
Figure XX
Figure 13. QSSC-S4R System Memory Topology