Specifications

Main Board Server Management QSSC-S4R Technical Product Specification
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0E 4 A6h Power Supply 4 RO 256
0F 5 AEh Front Panel Fan Board RW 256
10 5 A8h SAS (Optional) RW 256
3.2.6 System Event Log (SEL)
The BMC allocates memory space for logging system events. SEL events can range from critical system errors to
basic system monitoring reports. The SEL can be cleared in the system BIOS setup, or by using the SEL viewer utility
or Intel
® System Management application.
3.2.7 Real-Time Clock (RTC) Access
The BMC maintains a four-byte internal timestamp clock. The timestamp value is derived from an RTC element that is
internal to the BMC.In order for the BMC to remain in sync with the system RTC, the BIOS must send the Set SEL
Time command with the current system time to the BMC during system boot and before system shut-down. If the time
is modified through an OS interface, then the BMC’s time is not synchronized until the next system reboot.
3.3 Supported Features
3.3.1 Fan Speed Control
The BMC monitors and controls system fans, with each fan having a fan speed sensor that detects fan failure and may
also be associated with a fan presence sensor for hotswap support.
For redundant fan configurations, the fan failure
and presence status determines the fan redundancy sensor state.
The system fans are divided into fan domains, each of which has a separate fan speed control signal and a
separate configurable fan control policy. A fan domain can have a set of temperature and fan sensors associated
with it. These are used to determine the current fan domain state.
A fan domain has four states:
x Boost
x Lower Boost
x Sleep
x Nominal
The sleep, lower boost and boost states have fixed (but configurable via OEM SDRs) fan speeds associated with
them. The nominal state has a variable speed determined by the fan domain policy.
Nominal is the default state.
In this state, fan speeds are based on the ambient system temperature. A system temperature threshold is set via an
SDR. When the threshold is exceeded, it linearly ramps the fan speeds either until the fan speed reaches maximum
saturation or the temperature reduces below the threshold.
If the system temperature stays below the threshold, fan speed ramps back to the default speed. If system temperature
remains above the threshold, the system (through Closed Loop Thermal Throttling – CLTT) may throttle memory to
reduce heat dissipation. Fan settings are configurable via SDRs to allow for the specific cooling requirements needed
by system integrators. A test command can also be issued to manually force the fan speed to a selected value,
overriding any other control or policy.
3.3.2 PECI
The platform environment control interface (PECI) is a one-wire, self-clocked bus interface that provides a
communication channel between Intel® Architecture Processors and chipset components to the BMC’s integrated
PECI subsystem. The PECI bus communicates environmental information, such as temperature data, between the
managed components, referred to as the PECI client devices, and the management controller, referred to as the PECI
system host. The PECI standard supersedes older methods, such as the thermal diode, for gathering thermal data.
3.3.3 CPU Throttling
The BMC supports a PLD Power Throttle sensor which is used to log a SEL event when memory controller and/or the
CPUs are throttled encountering an over power drawn condition for the given power supply configuration and
capabilities.
System will throttle CPU when: