Specifications

QSSC-S4R Technical Product Specification Main Board
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2.3.10 Post Code LEDs
Eight light emitting diodes are used to indicate the raw binary output of BIOS POST codes. Although the value sent to
the POST Code LEDs may be the same as the port 80h value at times during the POST process, it is not guaranteed.
Table 6 shows the correlation the POST Code bit to LED reference designator.
Table 5. Boxboro-EX PCI Express Port Configuration
Bit 3 Bit 2 Bit 1 Bit 0
Hexadecimal
0 0 0 0 0
0 0 0 1 1
0 0 1 0 2
0 0 1 1 3
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6
0 1 1 1 7
1 0 0 0 8
1 0 0 1 9
1 0 1 0 A
1 0 1 1 B
1 1 0 0 C
1 1 0 1 D
1 1 1 0 E
1 1 1 1 F
The Post LEDs are situated as shown in the below table along with the corresponding reference designators.
Table 6. Post LEDs and Reference Designators
Post Code Bit LED Reference
Designator POST
Code LEDs
POST LED
7 (MSB) DS6P3
6 DS6P2
5 DS6P1
4 DS6N5
3 DS6N4
2 DS6N3
1 DS6N2
0(LSB) DS6N1
2.3.11 Programmable Logic Devices (PLDs)
The main board has two Programmable Logic Devices (PLDs) for fundamental logic on the main board.
1. PLD 1
2. PLD 2
Due to the nature of these devices, they are not programmable by an end user.
2.3.11.1 Powergood / Reset
Powergood / Reset: The main board pwren / pwrgd chain begins with logic which checks for both power supplies’
presence and power-ok input assertions. Based on these signals, PS_PWROK will assert to start the VR chain on the
main board.
x Upon assertion of the P1V5_PWRGD signal, VTT_PWREN signal will enable the VTT VR. VTT_PWRGD_3_3V
signal from VTT VR to the PLD will enable the CPU#_VR_PWREN to all regulators of populated CPUs.