Specifications

QSSC-S4R Technical Product Specification Main Board
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The timer/counter block contains three counters that are equivalent in function to those found in one 82C54
programmable interval timer. These three counters are combined to provide the system timer function, and speaker
tone. The 14.31818MHz oscillator input provides the clock source for these three counters.
ICH10R provides an ISA-compatible Programmable Interrupt Controller (PIC) that incorporates the functionality of two
82C59 interrupt controllers. The two interrupt controllers are cascaded so that 14 external and two internal interrupts
are possible. In addition, ICH10R supports a serial interrupt scheme.
All of the registers in these modules can be read and restored. This is required to save and restore system state after
power has been removed and restored to the platform.
2.3.1.10 Advanced Programmable Interrupt Controller (APIC)
In addition to the standard ISA-compatible PIC, ICH10R incorporates the APIC. The I/O APIC handles interrupts very
differently than 82C59. Briefly, these differences are:
Method of interrupt transmission - The I/O APIC transmits interrupts through memory writes on the normal data path to
the processor, and interrupts are handled without the need for the processor to run an interrupt acknowledgement
cycle.
Interrupt Priority - The priority of interrupts in the I/O APIC is independent of the interrupt number. For example,
interrupt 10 can be given a higher priority than interrupt 3.
More interrupts - The I/O APIC in ICH10R supports a total of 24 interrupts.
Multiple interrupt controllers - The I/O APIC architecture allows for multiple I/O APIC devices in the system with their
own interrupt vectors.
2.3.1.11 Universal Serial Bus (USB) Controllers
ICH10R contains two Enhanced Host Controller Interface (EHCI) host controllers that support USB high-speed
signaling. High-speed USB 2.0 allows data transfers up to 480Mb/s, which is 40 times faster than full-speed USB.
ICH10R also contains six Universal Host Controller Interface (UHCI) controllers that support full-speed and low-speed
signaling.
ICH10R supports 12 USB 2.0 ports. All 12 ports are high-speed, full-speed, and low-speed capable. ICH10R’s port-
routing logic determines whether a USB port is controlled by one of the UHCI or EHCI controllers.
Note: For OC# implementation the ICH10R hardware automatically shuts a port down when the OC# input associated with the port
is asserted. Since Thurley products will implemented the shared fuse scheme to reduce cost and free up board real estate, care
must be take to route the correct OC# signals to their associated OC# inputs on ICH10R.
2.3.1.12 Real-Time Clock (RTC)
ICH10R contains a Motorola MC146818A-compatible RTC with 256 bytes of battery-backed RAM. The RTC performs
two key functions: keeping track of the time of day and storing system data, even when the system is powered down.
The RTC operates on a 32.768KHz crystal and a 3V battery. The RTC supports two lockable memory ranges. By
setting bits in the configuration space, two 8-byte ranges can be locked to read and write accesses. This prevents
unauthorized reading of passwords or other system security information. The RTC also supports a date alarm that
allows for scheduling a wake up event up to 30 days in advance, rather than just 24 hours in advance.
2.3.1.13 Enhanced Power Management
ICH10R’s power management functions include enhanced clock control and various low-power (suspend) states, e.g.,
Suspend-to-RAM and Suspend-to-Disk. A hardware-based thermal management circuit permits software-independent
entrance to low-power states. ICH10R contains full support for the Advanced Configuration and Power Interface (ACPI)
Specification.
2.3.1.14 Manageability
The ICH10R integrates several functions designed to manage the system and lower the total cost of ownership (TCO)
of the system. These system management functions are designed to report errors, diagnose the system, and recover
from system lockups without the aid of an external microcontroller.
2.3.1.15 I/O Virtualization Technology (VT-d)
ICH10R provides hardware support for implementation of VT-d. VT-d consists of technology components that support
the virtualization of platforms based on Intel® Architecture processors. VT-d enables multiple operating systems and