Specifications
QSSC-S4R Technical Product Specification Main Board
33
Figure 14. QSSC-S4R Memory Riser Functional Block Diagram and DIMM Population Rules
Intel® 7500 Scalable Memory Buffer (Mill Brook) Functionality” on page 54.
2.3.1 ICH10R Southbridge
The Intel ICH10R incorporates a variety of PCI devices and functions. They are divided into seven logical devices. The
first is the DMI-to-PCI bridge (Device 30). The second device (Device 31) contains most of the standard PCI functions
that always existed in the PCI-to-ISA bridges (South Bridges), such as the Intel PIIX4. The third and fourth (Device 29
and Device 26) are the USB host controller devices. The fifth (Device 28) is PCI Express device. The sixth (Device 27)
is the HD Audio controller device, and the seventh (Device 25) is the Gigabit Ethernet controller device.
ICH10R provides extensive I/O support. Functions and capabilities include:
x PCI Express Base Specification, Revision 1.1 support
x PCI Local Bus Specification, Revision 2.3 support for 33MHz PCI operations (supports up to four REQ#/GNT#
pairs)
x ACPI Power Management Logic Support, Revision 3.0a
x Enhanced DMA controller, interrupt controller, and timer functions
x Integrated Serial ATA host controllers with independent DMA operation on up to six ports and AHCI support
x USB host interface with support for up to 12 USB ports; six UHCI host controllers; two EHCI high-speed USB 2.0
host controllers
x Integrated 10/100/1000 Gigabit Ethernet MAC with System Defense
x System Management Bus (SMBus) Specification, Version 2.0 with additional support for I
2
C devices
x Supports Intel
® High Definition Audio, Intel® Matrix Storage Technology, Intel® Active Management Technology,
Intel
® Virtualization Technology, and Intel® Trusted Execution Technology
x Low Pin Count (LPC) interface support
x Firmware Hub (FWH) interface support
x Serial Peripheral Interface (SPI) support
x Intel
® Quiet System Technology