Specifications

QSSC-S4R Technical Product Specification HSC Firmware Update
319
33. HSC Firmware Update
The HSC firmware is stored in a separate SPI-compatible EEPROM module. This EEPROM is only accessible by the
HSC to read or write operational code. The HSC reads code actively from the SPI EEPROM, which can contribute to
increased execution times.
33.1 HSC Update Over IPMB
Firmware updates primarily take place via the IPMB. This method requires a firmware update utility and an Intel hex-
format image.
The HSC firmware EEPROM is divided into primary and secondary areas. The primary area holds operational code
that is in use by the HSC. The secondary area stores an incoming firmware image. The transition between primary and
secondary area is handled internally to the HSC firmware and is transparent to other management controllers.
The following sections explain the IPMI commands used to update the firmware image.
33.1.1 Entering Firmware Transfer Mode
Firmware transfer / update mode can be entered at any time using the Enter Firmware Transfer Mode command to the
HSC. Of the firmware transfer mode commands, only the Enter Firmware Transfer Mode command is executable from
operational mode. The other firmware transfer commands are recognized only in firmware transfer mode.
33.1.2 Exiting Firmware Transfer Mode
This command causes firmware transfer mode to be exited. If the request data byte is not present, then the HSC
immediately considers it an abort and returns to operational mode. When the command provides a 01h as request
data, the HSC burns the new code, and initiates a hard reset. Sensor data is not retained across this reset and the
controller initializes as if a power on reset occurred.
The HSC provides an additional response byte indicating expected firmware burn and reboot time in seconds (0-255).
33.1.3 Firmware Transfer Version
The Get Device ID command returns the version number of the firmware. The HSC returns the device ID information
from the primary code area, regardless of whether it is in firmware update mode or operational mode. When in
firmware transfer mode, the HSC responds to Get Device ID with a short response. The auxiliary firmware revision data
is truncated and the device available bit is set to 1.
33.1.4 Verifying Entry Into Firmware Transfer Mode
It is possible to verify that the HSC is in firmware transfer mode by sending an IPMI Get Device ID request. If the HSC
responds with a truncated response (missing the auxiliary firmware revision) and the device available bit is set to 1,
then it is in firmware transfer mode.
33.1.5 Set Program Segment Command
This command sets the upper 16 bits of the address for the Firmware Read, Firmware Program, and Get Firmware
Range Checksum commands.
33.1.6 FLASH Erase and Sequential Programming
There is no explicit erase command. Flash blocks are erased as needed when the Exit Firmware Transfer Mode
command is executed. Therefore, firmware updating proceeds sequentially from the beginning of the operational code.
The HSC ignores all interfaces during a flash erase. Firmware transfer applications should have their time-outs and
retries designed accordingly. The worst-case flash erase time is one-half second.
33.1.7 Access to Operational Mode Commands
Except for Get Device ID, non-firmware transfer network functions and their associated responses are not recognized
in firmware transfer mode. Firmware transfer mode must be exited before issuing non-firmware transfer commands,
such as application or event message commands.