Specifications

Sensors QSSC-S4R Technical Product Specification
312
Full Sensor Name (Sensor name in SDR)
Sensor #
Sensor Type Event /
Reading Type
Event Offset Triggers Contrib. To
System Status
Assert / De- assert
Readabl e Value / Offsets
Event Data
Rearm Standby
Mem Riser 5 PWRGD Fail
('Mem
Rsr
5
PWRGD')
B4h Vol
t
age 02h Digi
t
al
Discre
t
e
03h
00 – S
t
a
t
e Deasser
t
ed Non-Fa
t
al As and De - Trig
O
ff
se
t
A –
Mem Riser 6 PWRGD Fail
('Mem
Rsr
6
PWRGD')
B5h Vol
t
age 02h Digi
t
al
Discre
t
e
03h
00 – S
t
a
t
e Deasser
t
ed Non-Fa
t
al As and De - Trig
O
ff
se
t
A –
Mem Riser 7 PWRGD Fail
('Mem
Rsr
7
PWRGD')
B6h Vol
t
age 02h Digi
t
al
Discre
t
e
03h
00 – S
t
a
t
e Deasser
t
ed Non-Fa
t
al As and De - Trig
O
ff
se
t
A –
Mem Riser 8 PWRGD Fail
('Mem
Rsr
8
PWRGD')
B7h Vol
t
age 02h Digi
t
al
Discre
t
e
03h
00 – S
t
a
t
e Deasser
t
ed Non Fa
t
al As and De - Trig
O
ff
se
t
A –
PLD-Based Power Thro
tt
le Sensor
(Power Thro
tt
led)
C0h OEM Sensor
F3h
Generic ‘Digi
t
al”
Discre
t
e
03h
01h –- S
t
a
t
e asser
t
ed Fa
t
al As and De – R
,
T M –
BB VCORE CPU1 (BB VCORE CPU1)
D0h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As and De Analog R
,
T A –
BB VCORE CPU2 (BB VCORE CPU2)
D1h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As De
Analog R
,
T A –
BB VCACHE CPU1 (BB VCACHE CPU1)
D2h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As De
Analog R
,
T A _
BB VCACHE CPU2 (BB VCACHE CPU2)
D3h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As De
Analog R
,
T A –
BB +3
.
3V AUX (BB
+3
.
3V AUX)
D4h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As De
Analog R
,
T A YES
BB VCORE CPU3 (BB VCORE CPU3)
D5h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As and De Analog R
,
T A –
BB VCORE CPU4 (BB VCORE CPU4)
D6h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As De
Analog R
,
T A _
BB VCACHE CPU3 (BB VCACHE CPU3)
D7h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As and De Analog R
,
T A –
BB VCACHE CPU4 (BB VCACHE CPU4)
D8h Vol
t
age 02h Threshold
01h
[
u
,
l
]
[
c
,
nc
]
nc = Degraded c
= Non-
f
a
t
al
As and De Analog R
,
T A _