Specifications

QSSC-S4R Technical Product Specification Main Board
29
2.2.1.4 Rbox: Intel® QuickPath Interconnect Router
The Intel® Xeon® Rbox is an eight-port router, where each port is an 80-bit, single-flit-wide Intel QuickPath
Interconnect port. Of the eight ports, four are connected to external Intel QuickPath Interconnect ports. The external
ports are 20-bit lanes nominally running at 6.4 GT/s. The external Intel QuickPath Interconnects transmit via the pads
and cross a clock domain into the uncore clock frequency. Two of the Rbox Intel QuickPath Interconnect ports are
connected directly to the home memory agents (Bboxes), and the other two are connected to the Sboxes.
One of the Intel QuickPath Interconnect ports connecting to a Bbox is shared by the Ubox. The Rbox manages Intel
QuickPath Interconnect-layer credits for the six Intel QuickPath Interconnect message channels (HOM, DRS, NCB,
NCS, NDR, and SNP) and provides three virtual networks, of which two (Vn0 and Vn1) are minimally buffered networks
used to prevent network deadlocks. A shared network (Vna) is also supported for performance and allows messages of
different types to dynamically compete for common buffer pools in the Rbox input ports. Credits are supplied to all
agents connected to the Intel QuickPath Interconnect ports, and the agents also supply credit to the Rbox. The Rbox
provides link-level retry on the output ports for the Intel QuickPath Interconnects going out of the socket. This improves
the reliability of the system by providing a capability to fix transient errors on flits sent over the external links.
The messages destined for another socket are buffered in the output port, ready to be replayed, until the associated
flits have been checked for errors and found clean.
2.2.1.5 Bbox: Intel® QuickPath Interconnect Home Agent
The Bbox is the Intel QuickPath Interconnect home coherence agent for the address space mapped to the FBD
memory of its partner Mbox (memory controller). Home messages (read and write requests, data write-backs from LLC
replacement victims or from data associated with snoop responses from the peer nodes, and snoop responses) are
sent to the Bbox. The Bbox contains a tracker, consisting of pre-allocated buffers for tracking system requests. The
buffers have associated state machines that manage the state of outstanding transactions, and are used to generate
messages to the requesting caching agents. The Bbox receives home requests from an Intel QuickPath Interconnect
caching agent (RNID) with a requestor tracker ID (RTID), which tells it where to put the incoming request in the tracker.
In a source snoopy protocol, the requesting socket will send snoops to the peer nodes, and the snoop responses are
returned (with the referencing RTID) to the home Bbox. The Bbox will collect all the snoop responses before sending
an Intel QuickPath Interconnect complete message to the requesting caching agent, either without data (NDR) if a peer
caching agent returned the data from the requestor, or with data from its partner Mbox (DRS).
2.2.1.6 Mbox: On-Chip Memory Controller
The Intel® Xeon® 7500 processor supports two integrated memory controllers (IMC) that each operates on a pair of
interlocked memory channels. Requests to the Mbox to read and write the DDR DIMMs are forwarded read and write
requests received from the Bbox. The memory controller implements a scheduler that optimizes for high bandwidth and
low latency. It supports an adaptive open and close page policy to reduce latency and required bandwidth. The
memory controller can operate on up to 32 simultaneous requests (reads and writes). The memory controller supports
several advanced RAS features. It implements both X4 and X8 Intel® SDDC (single device data correction) and
recovery from multiple bit failures. It performs replays on errors to recover from transient errors and supports lane
failover and spare lanes to recover from single FBD channel lane failures. The memory controller can be programmed
to perform patrol scrubbing (in addition to demand scrubbing) and in collaboration with Bbox, it enables memory
mirroring across home agents. It also supports sparing of memory within DIMMs in a memory controller. The memory
controller allows significant flexibility in supporting memory by allowing multiple DIMM types to be connected and
supports DIMM sizes spanning from 1 GB up to 16GB. The memory controller supports a minimum granularity of 2 GB
(across the memory controller) and can support up to 1 TB of memory. It supports a maximum of eight DIMMs and 16
Ranks per channel. It supports single, dual and quad-rank DIMMS within the 16-Rank restrictions. It supports DDR3
devices of speeds 800 to 1067MHz.
2.2.1.7 Ubox: System Configuration Agent
The Ubox is a system configuration agent organized as a number of modular utilities. Some of the different utilities
include serial IO interfaces (PECI service processor interface, SMBus System Management interface, internal and
external Flash ROM interfaces, CSR bridge), scratch registers and semaphores, interval timer, non-coherent message
broadcast utility (for VLW, Lock, IPI and exception messages), and exception configuration logic. It receives and sends
Intel QuickPath Interconnect transactions between the local socket agents and any other remote Intel® Xeon®
processors through the Rbox port shared with a Bbox.
2.2.1.8 Wbox: Power Controller
The Wbox contains the power control unit (PCU). The Wbox is responsible for power management functions including
managing transitions between power states and voltage / frequency operating points.