Specifications

Main Board QSSC-S4R Technical Product Specification
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800/1067 memory technologies. It uses a power-through-the-pins power delivery system and LS socket. Some key
features of the Intel® Xeon® 7500 processor are listed in Table 3.
Table 3. Intel® Xeon® 7500 processor key features
Feature 7500 processor Notes
Number of cores / threads per core 8/2 Total of 16 threads
Lowest-Level Cache (LLC) 24 MB Inclusive shared cache
Physical Address 44 bits
Intel QuickPath Interconnect speeds 4.8/5.86/6.4 GT/s Two high-performance connectors, plus
maximum of 17” FR4 trace length
Memory Technology DDR3=800, DDR3 1067
Power Delivery PTP Power-through-pins
Power TDP 130W, 105
ACPI states C0/C1,e/c3, P-State
S0/S1/S4
C1: halt, All, All cores halted; V/f scale to min.
voltage
Caching agents per socket 2 Each caching agent handles ½ of the
address space
LLC error protection DECTED on Data SECDED on Tags
Nod ID bits supported 5
Node Ids used per socket 3 Home Caching agent 01, 11, and Ubox 10
Bbox tracker entries 256 Maximum HA tracker entries
DCA yes Direct cache access via PrefetchHint
SCA yes Standard Configuration Architecture
OOB Interface PECI Out-of-Band Interface
2.2.1.1 Intel® Quick Path Interconnect (Intel® QPI): Common System Interconnect
Intel QuickPath Interconnect is the Intel proprietary point-to-point coherence interface. Intel QuickPath Interconnect is a
flexible interconnect that supports several different profiles optimized for the needs of different CPU segments, and
support several different protocol variants including source snoopy and home snoopy protocols. The Intel QuickPath
Interconnect protocol comprehends several distinct agents. The caching agent is a requesting agent (core or cores)
and the associated cache that can store a copy of the line. The Home agent is the owner of a portion of the memory
and responsible for satisfying the caching agent requests and the final arbiter in case of conflicts between multiple
requests to the same block. The configuration agent is the miscellaneous agent that is involved in non-coherent and
special message flows.
Intel QuickPath Interconnect comprehends a distributed but coherent NUMA (Non Uniform Memory Access) setup.
Coherency is managed through distributed or directed snoop messages. In the snoopy variant of the protocol, each
caching agent broadcasts snoop messages for each request to each peer snoopy caching agent. The peer agents
send snoop responses to the home agent targeted by the original request. The home agent resolves the final data
return, based on the snoop responses and the data fetched by the memory controller associated with the home agent.
The source snoopy variant is also called as the two-hop protocol, as the snoop processing is performed in the shadow
of memory/directory lookup. The memory fetch and the cache-to-cache data-forward both involve a maximum of two
hops in a fully-connected system. Intel® Xeon® 7500 implements the source-snoopy variant of the Intel QuickPath
Interconnect Protocol.
2.2.1.2 Cbox: Last Level Cache Coherency Engine
The Cbox is a bank of the inclusive LLC (3MB data with associated tags). The Cbox controller serves both as the local
coherence agent amongst cores on die, and the Intel QuickPath Interconnect caching agent for Intel QuickPath
Interconnect global Coherence.
2.2.1.3 Sbox: Intel® QuickPath Interconnect Caching Agent Bridge
The Sbox is a caching agent proxy for Intel QuickPath Interconnect-layer endpoints. It takes Intel QuickPath
Interconnect messages as 80-bit flits from the Rbox and converts them into Intel QuickPath Interconnect snoops, data,
and complete messages to the cores, and takes core requests and snoop responses and transmits them on the Intel
QuickPath Interconnect fabric to the Rbox. The Sbox also implements a bypass to its corresponding Bbox, transmitting
home requests for local memory references, and accepting data fills from local memory so that they do not need to go
through the router. When configured in hemisphere address mode, the Sbox will map the same half of memory that the
connected Bbox does.