Specifications

QSSC-S4R Technical Product Specification Processor Presence and Population Check
279
power is applied to the system and the previous system power state
was on.
05h Soft power control failure – Asserted if the system fails to power-on
due to the following power control sources:
x Chassis Control command
x PEF action
x BMC Watchdog Timer
x Power State Retention
Assertion and Deassertion
06h Power unit failure – Asserted for the following conditions:
x Unexpected deassertion of system POWER_GOOD signal.
x System fails to respond to any power control source’s attempt to
power down the system.
x System fails to respond to any hardware power control source’s
attempt to power on the system.
x Power Distribution Board (PDB) failure is detected
Assertion and Deassertion
24.25.1.1 Power Off
The BMC asserts the Power Off offset whenever the system DC power is off.
24.25.1.2 AC Lost
The BMC asserts the AC lost offset when AC power is applied to the system and the previous system power state was
on. This offset is for event generation only and does not remain asserted.
24.25.1.3 Soft Power Control Fault
The BMC asserts the Soft Power Control Failure offset if the system fails to power on within 8 seconds as instructed by
the following power control sources:
x Chassis control command
x BMC watchdog timer
x Power state retention
The BMC provides system status indication via the front panel LEDs. See Section 24.2.2. The BMC generates a beep
code for Power Control Fault. See Table 179.
24.25.1.4 Power Unit Failure
The BMC asserts the Power Unit Failure offset of the Power Unit sensor for the following situations:
x Power-good dropout (see Section 23.1.2).
x The system fails to power down: The POWER_GOOD signal fails to transition to the de-asserted state within 1
second when any of the enabled power control sources attempt to transition the system to the power-off state.
x The system fails to power-on due to any enabled hardware power control source: The POWER_GOOD signal from
the power sub-system fails to assert within 8 seconds in response to a chipset or front panel power button request
to power on.
x The BMC provides system status indication via the front panel LEDs as described in Section 24.2.2.
x The BMC generates a beep code for a power fault. See Table 179..
x A power distribution board (PDB) failure is detected.
24.25.2 Power Supply Fan Monitoring
In addition to the system fan monitoring supported the BMC monitors the power supply fans. These are monitored
primarily to support power supply failure management as described in section 24.22. The BMC FW supports one PS
Fan Fault sensor per power supply fan.
Monitoring is implemented via IPMI discrete sensors, one for each power supply fan. The BMC polls each installed
power supply using the PBMus fan status commands to check for failure conditions for the power supply fans. The
BMC asserts the “performance lags” offset of the IPMI sensor if a fan failure is detected.