Specifications

BIOS Error Handling QSSC-S4R Technical Product Specification
240
Sensor Name Sensor
Number
Sensor
Type
E/R T
y
pe Sensor-
specific
Offset
ED1 ED2 ED3
17h – to provide additional
Offset values.)
21.2.3.5 Compute Module Extension Sensors
See the EPSD Blade Extension External Product Specification, Revision 1.0 for additional sensors that may be
reported by some Compute Module models.
21.2.3.6 Watchdog Timer Timeouts
The BIOS and BMC cooperate to use the BMC Watchdog Timer for the BIOS POST FRB-2 timer and the OS Boot
timer. For details on these functions, see Section 21.1.1 and Section 21.1.2, respectively. Either of these timeouts
causes two events to be logged to the BMC SEL: BMC Watchdog Timeout and POST Error Code. The events, which
are logged, differ depending on which type of timeout occurred.
Note: The SEL Event contents (provided below) that are logged by the BMC are controlled by the Firmware team and are subject to
change at their discretion. These BMC SEL Events are included here only for clarity and convenience.
21.2.3.6.1 BIOS POST FRB-2 timeout
For a BIOS POST FRB-2 timeout, the timer purpose in the BMC event is “BIOS FBR 2 ” , and the POST Error Code is
0x8190.
Table 163. FRB-2 Timeout SEL Events
Generator ID Sensor
Type Code
Sensor
number
T
y
pe code E
v
ent Data1
Bytes Used
+ Offset
E
v
ent Data2 E
v
ent Data3
20h
(BMC Firmware)
23h
(Watchdog
Timer2)
03h
(Watchdog)
6Fh
(Sensor
Specific Offset)
C1h
(Data2 has Sensor
Specific Code;
Offset = Hard
Reset)
01H
(Interrupt =
None; Purpose
= BIOS FRB2)
FFh
(N/A)
33h
(BIOS POST)
0Fh
(System
Firmware
Progress)
06h
(BIOS POST
Error)
6Fh
(Sensor
Specific Offset)
A
0h
(OEM Codes in
Data2 & Data3)
90h
(Low Byte of
POST Error
Code)
81h
(High Byte of
POST Error
Code)
21.2.3.6.2 OS Boot timeout
For an OS Boot timeout, the timer purpose in the BMC event is “OS LOAD”, and the POST Error Code is 0x8198.
Table 164. OS Boot Timeout SEL Events
Generator ID Sensor
Type Code
Sensor
number
T
y
pe code E
v
ent Data1
Bytes Used
+ Offset
E
v
ent Data2 E
v
ent Data3
20h
(BMC Firmware)
23h
(Watchdog
Timer2)
03h
(Watchdog)
6Fh
(Sensor
Specific Offset)
C1h
(Data2 has Sensor
Specific Code;
Offset = Hard
Reset)
03h
(Interrupt =
None; Purpose
= OS Load)
FFh
(N/A)
33h
(BIOS POST)
0Fh
(System
Firmware
Progress)
06h
(BIOS POST
Error)
6Fh
(Sensor
Specific Offset)
A
0h
(OEM Codes in
Data2 & Data3)
98h
(Low Byte of
POST Error
Code)
81h
(High Byte of
POST Error
Code)
21.2.3.6.3 OS/SMS Watchdog timeout
In addition, the Operating System or OS drivers or the Server Management Software (SMS) may use the BMC
Watchdog Timer to prevent a permanent hang in the OS. In this case, the OS or application software is responsible for
setting and resetting the timer.
If an OS device driver is using the BMC Watchdog Timer to detect software or hardware failures and that timer expires,
this implies that the system has hung, and an Asynchronous Reset (ASR) is generated, equivalent to a hard reset, just
as with the OS Load timer.