Specifications
BIOS Role in Server Management QSSC-S4R Technical Product Specification
230
20.5.2.19 Type 38 Structure — IPMI Device Information
The SMBIOS Type 38 structure describes the attributes of the embedded IPMI controller on the server board. In
addition to the SMBIOS 2.3.1 Specification, two bytes have been appended to the Type 38 structure to provide
information about the interrupt used by the embedded IPMI controller and about the IPMI base address.
Table 157. SMBIOS Type 38 Structure
Of
f
set Name Length Value Description
00h Type Byte 38 IPMI device information structure indicator.
01h Length Byte 12h Number of bytes in this type structure.
02h Handle Word Varies The number of this structure in the table.
04h Interface Type Byte 01h 01h = KCS Interface.
05h IPMI
Specification
Revision
Byte 20h IPMI Specification, Version 2.0.
06h
I
2
C Slave
A
ddress
Byte Varies
Slave address of the I
2
C bus
Offset Name Length Value Description
07h NV Storage
Device Address
Byte Varies Bus ID of the non-volatile storage device.
08h Base Address QWord Varies The base address for the BMC‘s system interface. The field can describe
both I/O mapped and memory-mapped base addresses. The least
significant bit indicates whether the base address is an I/O address or a
memory address. The most significant 63 bits holds the most significant 63
bits (bits 63:1) of a 64-bit address. The least significant bit (bit 0) of the
base address is kept in the Base Address Modifier field.
10h Base Address
Modifier /
Interrupt Info
Byte Varies Base address modifier:
Bit 7:6 Register spacing
00b = interface registers are on successive byte boundaries
01b = interface registers are on 32-bit boundaries
10b = interface registers are on 16-byte boundaries
11b = reserved
Bit 5
Reserved. Return as 0b.
Bit 4 LS-bit for addresses
0b = Address bit 0 = 0b
1b = Address bit 0 = 1b
Interrupt information identifies the type and polarity of the interrupt
associated with the IPMI system interface, if any.
Bit 3
1b = interrupt information specified
0b = interrupt information not specified
Bit 2
Reserved. Return as 00000b. Bit 1 Interrupt polarity
1b = active high
0b = active low
Bit 0 Interrupt Trigger Mode
1b = level
0b = edge
11h Interrupt Number Byte Varies Interrupt number for the IPMI system
interface. 00h = Unspecified / unsupported
20.5.2.19.1 Other SMBIOS Structures for Modular Server Systems
See the EPSD Blade BIOS Extension External Product Specification for additional SMBIOS
types that may be reported
by some compute module models.
20.5.2.19.2 Type 127 Structure — End-of-Table
The SMBIOS Type 127 structure identifies the end of the structure table that may be earlier than the last byte within
the buffer specified by the structure. To ensure backward compatibility with management software written for previous
versions of the SMBIOS Specification, the structure table is still reported as a fixed-length and the entire length of the
table can still be indexed. If the end-of-table indicator is used in the last physical structure in a table, the field‘s length is
encoded as 4.