Specifications

QSSC-S4R Technical Product Specification BIOS Initialization
173
x Get Fan Configuration: Used to get the SDR records from the BMC. If no profiles are supported, the BMC defaults
to profile 0.
x Set Fan Configuration: Used by the BIOS to
x Enable a supported BMC Fan Control profile
x Communicate to the BMC that the BIOS has completed the setup of the memory throttling and DIM
temperature sensor state.
x Provide DIMM temperature sensor availability data to the BMC. This can take several instances of this
command, one for each DIMM group.
x Get Thermal Profile: Provides a way for the BIOS to retrieve the thermal profile data for a specified thermal
throttling mode and fan profile.
The BIOS issues the IPMI Get Thermal Profile command during early POST to retrieve the appropriate thermal profile
as indicated by the user in the BIOS setup (performance or acoustic). If the BIOS cannot retrieve the thermal
parameters from the BMC, it uses the Memory Reference Code (MRC) default settings for the Intel® Boxboro-EX
Chipset and the DIMM thermal throttling configuration. Any setting changes from use of these commands do not take
effect until the next reboot to minimize IPMI communications in early POST and to
decrease boot times.
Table 105. Set Fan Control Configuration Command Format
89h Set Fan
Control
Configuration
Request:
Byte 1 – Fan profile to enable
0 = Fan profile 0 (default profile)
1 = Fan profile 1
2 = Fan profile 2
3 = Fan profile 3
4 = Fan profile 4
5 = Fan profile 5 (not valid for QSSC-S4R)
6 = Fan profile 6 (not valid for QSSC-S4R)
7 = Fan profile 7 (not valid for QSSC-S4R) FFh = None
specified (do not change current setting)
A
ll other values reserved
Byte 2 – Flags
[7:3] – Reserved
[2] – Memory temp sensor and memory throttling
configuration status
0 = Not started or in-progress
1 = Completed
[1:0] – Memory Throttling Mode
0 = None supported
1 = Open-loop thermal throttling (OLTT) – this option is
not supported for QSSC-S4R (reserved)
2 = Close-loop thermal throttling (CLTT)
3 = None specified (do not change current setting)
Byte 3 – Memory Device Group ID
0 = CPU #1 group
1 = CPU #2 group
2 = CPU #3 group
3 = CPU #4 group
0xFF=None specified
A
ll other values reserved
Bytes 4 to 11 -- Memory device presence bit map
64-bit map for indicating the presence of a memory
temp sensor for devices in the specified group ID. Byte
ordering is LSByte first. Setting a bit to 1 indicates that
the associated device is present and its temperature
should be monitored. Device enumeration corresponds
to bit-position in the bit-mask.
These bytes are only valid if the Memory Device Group
ID field is not set to FFh (unspecified).
Response:
Byte 1 – Completion code
This command must be supported on
both the SMM and SMS interface.
Provides a method for the BIOS to:
Enable a supported fan control profile.
Communicate the memory throttling mode to
the BMC (OLTT vs CLTT).
Provide an indication to the BMC that the BIOS
has completed setup of memory throttling and
DIMM temp sensor state.
Provide memory temp sensor availability data
to the BMC.
On BMC reset or power-up:
The default enabled fan profile for a given fan
control domain is the lowest numbered profile
that is supported in the loaded SDRs.
If no profiles are fully supported
across all configured fan domains, the
BMC defaults to profile 0.
Only CLTT is supported for Emerald
Ridge
Note: For QSSC-S4R, during POST, memory
hot-plug, and logical memory offlining, BIOS will
need to send this command once for each
installed CPU.
The definition of the Memory Device Presence
Bit-map (bytes 4 to 11) for QSSC-S4R is as
follows:
Bits 31:0 are used for indicating the presence of
a DIMM temp device.
Bits 39:32 are used for indicating the presence of
a memory buffer (Mill Brook) temp device
Bits 63:40 are reserved
The following throttling SDR format supports CLTT. System thermal engineers are responsible to provide SDR values
following the SDR formats shown in Table 106.
Table 106. Thermal Profile Data SDR Record Format
Byte N a m e D e s c r i p t i on
0:2 OEM ID Intel manufacturers ID – 157h, little endian