Specifications

BIOS Initialization QSSC-S4R Technical Product Specification
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5 IOH-2 Gen2 x8 8Gbps PCI Express x8 Slot 5 No
6 IOH-2 Gen2 x8 8Gbps PCI Express x8 Slot 6 Yes
7 IOH-2 Gen2 x8 8Gbps PCI Express x8 Slot 7 Yes
8 IOH-2 Gen2 x4 4Gbps PCI Express x8 Slot 8 No
9 IOH-2 Gen1 (ESI) x4
2Gbps
PCI Express x4 Slot 9 Half No
10 ICH-10 Gen1 x4 2Gbps PCI Express x8 Slot 10 Half No
11 IOH-1 Gen2 x8 8Gbps PCI Express x8 Slot for SAS
riser
No
12 IOH-1 PCIe/ESI x4 2Gbps ESI (IOH-to-ICH) N/A
13 ICH-10 Gen1 x1 512Mbps Link for IBMC/Video
in IO Riser
N/A
14 IOH-1 Gen1 x2 1Gbps GbE NIC in IO Riser N/A
15 IOH-1 Gen1 x2 1Gbps GbE NIC in IO Riser N/A
Hot plug user interface consists of an attention button, mechanical latch, attention LED and power LED for each hot
pluggable PCI Express slot.
16.9 Fan Speed Control and Thermal Management
The BIOS and BMC software work cooperatively to implement system thermal management support.
This is accomplished with a combination of memory and processor thermal management as described in the following
sub-sections.
16.9.1 DIMM Thermal Management
The BIOS implements support for Static Closed Loop Thermal Throttling (CLTT) in conformance with the requirements
indicated in the
Common Fan Speed Control and Thermal Management Platform Architecture Specification (PAS).
16.9.1.1 Static Closed Loop Thermal Throttling (CLTT) Operation
For QSSC-S4R 4S Server Board family, the BIOS always attempts to configure the system for Static Closed Loop
Thermal Throttling (CLTT) whenever possible. The sole criterion for deciding this is the requirement that all DDR3
DIMMs installed must have Module Thermal Sensors in order to use CLTT.
For RDIMMs, CLTT is the always
supported and all RDIMMs must have Thermal Sensors. If a RDIMM has failed
sensor, BIOS will not configure CLTT and error manager will show that error.
Reason to support only CLTT mode is that CLTT is far better able than OLTT to accurately control memory
temperatures, which is necessary to manage system performance within thermal parameters.
16.9.1.2 Fan Profile Option
The BIOS setup provides a fan profile option allowing the user to influence the system acoustic profile.
16.9.1.3 IPMI Thermal profile commands
The BMC has multiple SDRs for CLTT. The BIOS must read both the CLTT SDRs (altitude) and cache it in a variable
for reading on subsequent boots. Although there are up to eight profiles available, the QSSC-S4R implementation is
expected to only make use of 5 profiles. There is one profile associated with each of four altitude settings. The four
altitude settings are:
x less than 300m,
x between 301m and 900m,
x between 901 and 1500m,
x greater than 1501m.
Additionally, a default profile is defined which the BMC applies upon system power on until BIOS changes the enabled
profile after system boot. This default profile excludes all fan control based on DIMM and Mill Brook temperature
sensors and must be configured to provide sufficient cooling capability under this constraint
CLTT = Profile 0, 1, 2, 3, 4, 5, 6, 7, BIOS should use the altitude as per the BIOS setup question such that
300M=profile1, 900M=profile2, 1500M=profile3, and 3000M=profile4.
The BIOS can manipulate these SDRs by using the following IPMI commands: