Specifications

QSSC-S4R Technical Product Specification BIOS Initialization
163
16.2.12.2.6 DIMM Fault Indicator LEDs
Intel® Boxboro-EX Chipset server boards that use the Intel® Nehalem-EX processor have a fault-indicator LED
adjacent to each DIMM socket on the memory boards. The LEDs are turned on when the DDR-3 DIMM on the adjacent
DIMM socket generates the error events described below.
The generic usage model for the DIMM Fault LEDs is described in the following table.
Table 98. DIMM Fault LED Behavior Summary
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A DDR3 DIMM causes a DIMM
Population Error during POST memory
initialization.
POST Memory Initialization DIMM Fault LED is NOT turned on.
“Memory Error” beep code is NOT
emitted.
A DDR3 DIMM has an SPD read failure
during POST memory initialization.
POST Memory Initialization DIMM Fault LED is NOT turned on.
“Memory Error” beep code is NOT
emitted.
A DDR3 DIMM fails Memory BIST
during POST. Usable memory remains
available.
POST Memory BIST DIMM Fault LED is turned on.
“Memory Error” beep code is
emitted.
A DDR3 DIMM fails Memory BIST
during POST. No usable memory
remains.
POST Memory BIST DIMM Fault LED is NOT turned on.
“Memory Error” beep code is
emitted.
Correctable error threshold reached for
a failing DDR3 DIMM.
All modes DIMM fault LED for the failed DIMM
is turned on when the error count
reaches the threshold.
Uncorrectable error occurs on a DDR3
DIMM.
All modes DIMM fault LED for the failed DIMM
is turned on.
DDR3 DIMM fails Memory BIST during
memory hot add.
Memory Hot-Plug DIMM Fault LED is turned on.
“Memory Error” beep code is
emitted.
16.2.12.2.7 System Status Indicator LEDs
Intel
®
7500 Chipset server boards that use the Intel® Xeon® 7500 processors have a system status indicator LED on
the front panel. This indicator LED has specific states and corresponding interpretation as shown in the following table.
Table 99. Front Panel Status LED Behavior Summary
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Green Blink System is
transitioning to a
degraded mode
with all units still
functional
 Unable to use all of the installed memory (more than one DDR3
DIMM installed).
 Correctable error threshold has been reached for a failing DDR3
DIMM on a given channel and the memory system is migrating to a
spare channel (in the sparing mode).
 Correctable error threshold has been reached for a failing DDR3
DIMM on a given channel in the mirroring mode.
 Loss of redundancy from Mirror mode when UC occurs.
Amber Blink System is
transitioning to a
degraded state
 Correctable error threshold has been reached for a failing DDR3
DIMM when the system is operating in the non-RAS mode.

Amber On Critical Uncorrectable memory error in the non-mirroring mode.
The Status LED is controlled by the BMC, but the BIOS informs the BMC of the memory errors as described in the
preceding table.
2.2.11.2.7 Machine Check Exception or NMI Generation
The hardware generates a Machine Check Exception (MCE) when an Uncorrectable Error occurs. At the same time,
ERR0# is asserted, which in turn generates a System Management Interrupt (SMI).