Specifications

QSSC-S4R Technical Product Specification BIOS Initialization
161
16.2.12.2.3 Memory BIST Error Reporting
There are a number of conditions that can be detected and reported during Memory BIST, which includes the
initialization of the memory subsystem.
During memory discovery, any DDR3 DIMMs that cannot be initialized or ones that fail Memory BIST are disabled.
1. If at any point during BIST all DIMMs have failed BIST or are otherwise disabled, and there is no usable memory
remaining in the system, the BIOS sounds a memory error beep code and halts with Diagnostic LED code 0xEB
displayed.
Nothing else is done – no DIMM fault LEDs are lit, no SEL events are logged. The System Status LED will not be
lit,
2. If an installed DIMM does not respond to a read request for SPD (Serial Presence Detect) data, then that DIMM is
not detected as installed. The response from the SPD Serial EEPROM is what determines the DIMM‘s presence. It
appears to be an empty DIMM socket.
3. If the DIMMs on a memory channel respond to SPD read requests, but the channel fails DQ/DQS training during
memory channel initialization, then:
x Any DIMMs on that channel are disabled.
x A memory error beep code is sounded and Diagnostic LED code 0xEA is displayed.
x If no usable memory remains, then memory initialization is terminated and the system is halted with 0xEA
staying displayed.
x If additional usable memory remains in the system, then POST memory initialization and BIST continue.
4. If a DIMM‘s SPD EEPROM responds, but there is a read error while reading the SPD data:
x That DIMM is disabled.
x The DIMM Fault LED for the DIMM is not
lit.
x The Memory Error Beep code is not
sounded for an SPD Failure.
x The System Status LED is not
affected by an SPD Failure.
x Error Manager Major error codes 0xE7xx (DIMM SPD failure) and 0xE1xx (DIMM disabled) are displayed and
logged to SEL for the DIMM.
x If there is another DIMM installed on the same memory channel, that other DIMM is shown as having failed
Memory BIST and is also disabled. See #8 below for “Failed Memory BIST”.
5. If a DIMM‘s SPD information can be read, but from the SPD it is determined that the DIMM does not meet the size,
type, organization, speed, or timing constraints for the board, it is marked as having “Failed Memory BIST”
– see
#8 below.
6. If a single DIMM is installed in the wrong DIMM slot on a memory channel:
x The DIMM is disabled as a “Population Err
or ” (“Disabled”, but not “Failed”).
x The DIMM Fault LED for the DIMM is not
lit.
x The Memory Error Beep code is not
sounded for a Population Error.
x The System Status LED is not
affected by a Population Error.
x Error Manager Major error codes 0xE1xx (DIMM disabled) is displayed and logged to SEL for the DIMM.
7. If a DIMM fails BIST, it is marked as “Failed Memory BIST” – see #8 below.
x Another second DIMM on the same channellock step pair , it is also marked “Failed ” as “Failed Memory BIST
Failed” error.– also see #8 below .
x Second DIMM pair on failed mBIST channel will also be marked as “Failed” if DIMMs are present.eg
{DIMM_B2,DIMM_D2} are also marked as Failed when one of {DIMM_B1,DIMM_D1} is failed memory BIST.
8. For each DIMM that has been marked as “Failed”, that DIMM is disabled as “MemBIST Failure. If no usable
memory remains, see #1 above. Otherwise, the DIMM Fault LED is lit for that DIMM socket and a SEL Event for
“Uncorrectable Err
or ” is logged for the DIMM. Error Manager error codes 0xE6xx (Memory BIST Failed) and
0xE1xx (DIMM disabled) are displayed and logged to SEL for the DIMM.