Specifications

QSSC-S4R Technical Product Specification BIOS Initialization
159
16.2.12.2.2.2 Memory Mismatch and Configuration Errors
Table 92. Format of Memory Mismatch Error SEL Records
Sensor
Number
Sensor Type
Code
Event/Reading Type Description
0x03 0x0C 0x6F Memory mismatch / configuration error
Event Data 1
0xA7 DIMM mismatch/disabled
Event Data 2

Bits [5] SMI Link# Valid
Bits [4] DIMM Slot# Valid
Bits [3:0] Error Type
0000b – Reserved
0001b – Mirror
0010b – Spare
0011b – Interleave
0100b – Hemisphere
0101b – Population
0110b – Device Mismatch
0111b – 1111b: Reserved
Event Data 3

Bits[7:4] Index of Memory Board experiencing the mismatch error
Bits[3] Reserved.
Bits [2:0] Index of Memory DIMM Module experiencing the mismatch error.
16.2.12.2.2.3 SMI Link CRC Error Records
Table 93. Format of SMI Link CRC Correctable Error SEL Records
Sensor
Number
Sensor Type
Code
Event/Reading Type Description
0x05 0x0C 0x76 SMI Link CRC error
Event Data 1
0xA0 Persistent Recoverable Error
0xA1 Persistent Parity Alert
0xA2 Persistent Parity Status
0xA7 SMI Link Lane Fail Over (LFO) Event
Event Data 2
Bits [7:0] Reserved. Set to 0.
Event Data 3
Bits[7:4] Index of Memory Board experiencing the SMI Link CRC error..
Bits [4:3] Reserved.
Bits[2] SMI Link#
Bits [1:0] Reserved.
Table 94. Format of SMI Link CRC Uncorrectable Error SEL Records
Sensor
Number
Sensor Type
Code
Event/Reading Type Description
0x0C 0x0C 0x77 SMI Link CRC error
Event Data 1
0xA0 Uncorrectable CRC Error
0xA1 Uncorrectable Alert Frame
Event Data 2
Bits [7:0] Reserved. Set to 0.
Event Data 3
Bits[7:4]
Index of Memory Board experiencing the SMI Link CRC error
Bits[3] Reserved.
Bit[2] SMI Link#
Bits [1:0] Reserved.