Specifications

QSSC-S4R Technical Product Specification BIOS Initialization
155
16.2.12.2.1.1 Device Location Information
The QSSC-S4R system defines memory devices in units of CPU sockets, Memory Boards, Intel® SMI Link, DDR3
Channel and finally DIMM slots.
This information is available in the SMBIOS tables as Type 16 and Type 17 records. However, if SMBIOS support is
not available, as is the case with SMS software, these various fields as embedded in Event Data Byte 3 data of the
SEL logs must be interpreted as follows:
Table 85. Device Locator Nomenclature
Device Locator Bit [7.0] Bit Value Locator Identifier
String
CPU Socket
(CPU #)
Bit[7:5] 000b “CPU_1”
Bit[7:5] 001b “CPU_2”
Bit[7:5] 010b “CPU_3”
Bit[7:5] 011b “CPU_4”
Memory Board
(Board #)
Bit[7:4] 000b “MEM1_SLOT”
Bit[7:4] 001b “MEM2_SLOT”
Bit[7:4] 010b “MEM3_SLOT”
Bit[7:4] 011b “MEM4_SLOT”
Bit[7:4] 100b “MEM5_SLOT”
Bit[7:4] 101b “MEM6_SLOT”
Bit[7:4] 110b “MEM7_SLOT”
Bit[7:4] 111b “MEM8_SLOT”
Reserved Intel ®
SMI Link
(Link #)
Bit[7:4] 1000b-1111b Reserved
Bit[3] Reserved Reserved
Bit[2] 0b “SMI_LINK0”
Bit[2] 1b “SMI_LINK1”
DDR3 Channel
(Channel #)
Bit[2, Bit[0] 00b CHANNEL B
Bit[2, Bit[0] 01b CHANNEL A
Bit[2, Bit[0] 10b CHANNEL D
Bit[2, Bit[0] 11b CHANNEL C
DIMM Slot
(DIMM Slot #)
Bit[2:0] 000b DIMM_1B
Bit[2:0] 001b DIMM_1A”
Bit[2:0] 010b DIMM_2B”
Bit[2:0] 011b DIMM_2A”
Bit[2:0] 100b DIMM_1D”
Bit[2:0] 101b DIMM_1C”
Bit[2:0] 110b DIMM_2D”
Bit[2:0] 111b DIMM_2C”
For example, interpretation of device location DIMM_B1 of CPU_4,MEM_SLOT8 will be as below:
CPU# = ED3[7:5] = 011b
Memory Boards# = ED3 [7:4] = 0111b
Intel SMI Links# = ED3[2] = 0b
DDR3 channels = ED3[2]+ED3[0] = 00b
DIMM slot-000b = ED3[2:0] = 000b
Table 86. CPU Socket and Memory Board Grouping
CPU1
MEM1_SLOT MEM2_SLOT
CPU2
MEM3_SLOT MEM4_SLOT
CPU3
MEM5_SLOT MEM6_SLOT