Specifications

QSSC-S4R Technical Product Specification BIOS Initialization
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Figure 70. Intra-Socket Mirroring
16.2.10.4.2 Inter-Socket Mirroring
Intel® Xeon® 7500 processor supports mirroring memory between two IMCs across CPU sockets. Inter Socket
Mirroring Pairs depend upon the hemisphere mode. Inter Socket Mirroring pairs will change based on hemisphere type.
One IMC is configured as primary and one IMC is configured as secondary in each CPU socket when Hemisphere
mode is None. The primary and the slave across two sockets are paired as mirrors. On a fully populated system, the
mirror pairs will be {MEM1_SLOT, MEM4_SLOT}, {MEM3_SLOT, MEM2_SLOT}, {MEM5_SLOT, MEM8_SLOT} and
{MEM7_SLOT, MEM6_SLOT}.
Following picture shows Inter Socket mirroring when Hemisphere mode is disabled.